DFFen

D Flip-Flop with Enable

Parameter

Name	Description
DW	data width
rstValue	reset value

Port

Name	Direction	Width	Description
dnxt	Input	DW	Input of Flip-Flop
qout	Output	DW	Output of Flip-Flop
en	Input	1	Allow data update in next clock cycle, Active High
CLK	Input	1	Clock drives the Flip-Flop
RSTn	Input	1	Asynchronous reset of Flip-Flop. Active Low

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To allow blocking update, D Flip-Flop with Enable add an enable port, based on D-FF.