DFF
| Name | Description |
|---|---|
| DW | data width |
| rstValue | reset value |
| Name | Direction | Width | Description |
|---|---|---|---|
| dnxt | Input | DW | input of Flip-Flop |
| qout | Output | DW | output of Flip-Flop |
| CLK | Input | 1 | Clock drives the Flip-Flop |
| RSTn | Input | 1 | Asynchronous reset of Flip-Flop. Active Low |
D Flip-Flop is the basic element of timing logic, which is mainly used to instantiate the registers.
