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Add HMR Unit#15

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micprog wants to merge 51 commits intomasterfrom
michaero/hmr-cleanup
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Add HMR Unit#15
micprog wants to merge 51 commits intomasterfrom
michaero/hmr-cleanup

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@micprog micprog commented Jan 10, 2024

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@micprog micprog requested a review from yvantor January 10, 2024 11:39
@micprog micprog force-pushed the michaero/hmr-cleanup branch 4 times, most recently from ad8629c to d6920e2 Compare January 10, 2024 15:19
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I have left a couple of comments, but besides that it looks good.

.sw_resynch_req_o ( dmr_resynch_req_o [i] ),
.sw_synch_req_o ( dmr_sw_synch_req [i] ),
.checkpoint_o ( checkpoint_reg_q [i] ),
.checkpoint_o ( '0),//checkpoint_reg_q [i] ),
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Are we forcing an output to 0?

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Currently, I am unsure how to proceed with the checkpoint. Each core may support a different form of booting, so it is not guaranteed that overwriting the boot address with this checkpoint makes sense (our SoCs also support a separate boot address, so this could be used). Nonetheless, I think it would make sense for us to discuss this register further offline, again prior to merging.

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Before completely remove this I would make sure some of the IPs in it a preserved (there are some filters that did not end up in the final hmr_unit implementation these two basically)

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I intended to make the module far more configurable, allowing for different bus protocols as well. This means extracting the response suppression outside. There is preliminary support for this within the module (some signals from the ctrl FSMs), but these are not fully connected yet. I agree, though, that this is a required change prior to merging.

@micprog micprog marked this pull request as draft January 17, 2024 16:56
micprog and others added 23 commits May 3, 2024 17:04
HMR: Add ODRG & TCLS support

HMR: add initial configuration regfile

HMR: additional registers

Add files, initial fixes

Add registers for tmr, modify and connect config

Clarify core interleaving with functions, fixes

Clean up

Changed HMR interface's core grouping parameters to localparam as they depend on other parameters. Removed dependency from red_mode_q in generate statements.

Indentation 🎨

Having couples of cores with the same inputs and generating the same outputs.

Integrated DMR Core Checker.

Use functions for DMR core selection

Reposition TMR registers and FSM

Externalize TMR control from HMR

Add DMR configuration registers

HMR: Add C include files

Fix signal assignment in TMR mode
Making clear that the internal Floating-Point memory decoder is actually for Floating-Points.

Added functions for DMR grouping.

Reverted grouping functions to previous implementations

Recovery Routine quite complete for RF refill.

Successfully rewriting cores' RF from backup copy.

Resuming cores from debug mode during recovery routine.

Reverted phase of instruction lock signal.

Reverted core reset into synchronous setback for clear.

Recovering cores' Program Counter during the Recovery Routine.

Move recovery and DMR files to HMR

Change debug_rsp to debug_halted

Bind branch address read from Recovery PC to assertion of internal branch detection.

Fixed PC backup.

Remove intruder lock

Making DMR address generator start from 0.
Add TMR-DMR support in assignments
Update signal alignments
Turneded max into function because Synopsys does not synthesize it.
Fix TMR synch request
Squashing all DMR checkers into only one.

Small cleanup.
@micprog micprog force-pushed the michaero/hmr-cleanup branch from d6920e2 to fca3624 Compare May 3, 2024 15:33
@micprog micprog force-pushed the michaero/hmr-cleanup branch from fca3624 to ea4fbca Compare May 3, 2024 15:38
@micprog micprog force-pushed the michaero/hmr-cleanup branch from ea4fbca to 3eafd9a Compare May 3, 2024 15:45
@micprog micprog force-pushed the michaero/hmr-cleanup branch from 26e559b to 1c93c1d Compare May 3, 2024 15:58
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micprog commented Aug 7, 2025

Merged in #35

@micprog micprog closed this Aug 7, 2025
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2 participants