Bump LLVM to 80603c6672226cb48798bd60120c8f859dbeca19.

[mikeurbach]

This is a clean LLVM bump.

While testing, I did notice one circt-synth test that was not gated behind a libz3 requirement, so I added that.

[seldridge]

I think we've got competing bumps, now! Does this subsume: #10010 ?

[uenoku]

This subsumes so let's use this one.

[uenoku]

Thanks!

[fabianschuiki]

Results of circt-tests run for 11ffa1f compared to results for 93c30ea:

sv-tests

Changes in emitted diagnostics:

• -49 total change
• -5 error: failed to legalize operation 'moore.fmt.string'
• -5 error: failed to legalize operation 'moore.variable'
• -4 error: failed to legalize operation 'moore.fork'
• -3 error: unsupported statement: Disable
• -2 error: dynamic loop variable is unsupported
• -2 error: failed to legalize operation 'moore.fstring_to_string'
• -2 error: unsupported construct in ClassType members: ConstraintBlock
• -2 error: unsupported module member: PrimitiveInstance
• -2 error: unsupported statement: RandSequence
• -2 error: unsupported system call `$monitor`
• -1 error: 'llhd.halt' op expects parent op to be one of 'llhd.process, llhd.final'
• -1 error: 'moore.dyn_extract_ref' op using value defined outside the region
• -1 error: failed to legalize operation 'moore.builtin.random'
• -1 error: failed to legalize operation 'moore.builtin.urandom_range'
• -1 error: failed to legalize operation 'moore.null'
• -1 error: unknown hierarchical name `i`
• -1 error: unknown hierarchical name `x`
• -1 error: unsupported assignment pattern with type '!moore.queue<f64, 2>'
• -1 error: unsupported construct: Checker
• -1 error: unsupported construct: Primitive
• -1 error: unsupported expression: CopyClass
• -1 error: unsupported expression: MinTypMax
• -1 error: unsupported format specifier `%c`
• -1 error: unsupported module member: SpecifyBlock
• -1 error: unsupported statement: ProceduralAssign
• -1 error: unsupported system call `$fopen`
• -1 error: unsupported system call `$readmemb`
• -1 error: unsupported system call `$strobe`
• -1 error: unsupported system call `$value$plusargs`
• -1 error: unsupported system call `prev`

Introduced 304 segfaults:

• chapter-11/11.10.3--empty_string.sv
• chapter-11/11.3.6--assign_in_expr-sim.sv
• chapter-11/11.4.12.1--repl_op.sv
• chapter-11/11.4.14.3--unpack_stream-sim.sv
• chapter-11/11.4.2--unary_op_dec-sim.sv
• chapter-11/11.5.2--multi_dim_array_addressing.sv
• chapter-12/12.8--continue.sv
• chapter-12/12.8--return_val.sv
• chapter-13/13.3--task-label.sv
• chapter-15/15.5.2--named-event-wait.sv
• chapter-16/16.12--property-disable-iff.sv
• chapter-16/16.2--assert0.sv
• chapter-18/18.15--manually-seeding-randomize_0.sv
• chapter-18/18.17--random-sequence-generation-randsequence_0.sv
• chapter-18/18.17.4--repeat-production-statements_0.sv
• chapter-18/18.5.13--constraint-guards_0.sv
• chapter-18/18.5.8.2--array-reduction-iterative-constraints_0.sv
• chapter-20/20.6--typename.sv
• chapter-20/20.8--ceil.sv
• chapter-20/20.8--floor.sv
• chapter-21/21.2--strobe.sv
• chapter-23/23.2--module-definition.sv
• chapter-26/26.2--package-decl.sv
• chapter-26/26.3--package-ref.sv
• chapter-5/5.6.4--compiler-directives-pragma.sv
• chapter-5/5.7.1--integers-sized.sv
• chapter-6/6.10--implicit_port_connection.sv
• chapter-6/6.17--event.sv
• chapter-6/6.19.3--enum_type_checking.sv
• chapter-6/6.19.4--enum_numerical_expr_cast.sv
• chapter-6/6.20.2--parameter.sv
• chapter-6/6.20.3--parameter_type.sv
• chapter-6/6.20.4--localparam_logic.sv
• chapter-7/arrays/associative/alloc.sv
• chapter-7/arrays/associative/methods/first.sv
• chapter-7/arrays/dynamic/op-delete.sv
• chapter-7/arrays/packed/equality.sv
• chapter-7/arrays/packed/operations.sv
• chapter-8/8.11--this.sv
• chapter-8/8.15--super.sv
• chapter-8/8.5--parameters.sv
• chapter-8/8.7--constructor.sv
• chapter-8/8.8--typed_constructor.sv
• chapter-9/9.4.1--delay_control-sim.sv
• chapter-9/9.4.2--event_control_sim_minimal.sv
• chapter-9/9.7--process_cls_kill.sv
• generated/assignment-strengths/10.3.4--assignment_highz1_strong0.sv
• generated/assignment-strengths/10.3.4--assignment_supply1_strong0.sv
• generated/assignment-strengths/10.3.4--assignment_weak1_pull0.sv
• generated/assignment_sim/11.4.1--log_shr_assignment-sim-1.sv
• generated/assignment_sim/11.4.1--xor_assignment-sim-1.sv
• generated/basejump/bsg_cache_BaseJumpSTL_bsg_cache_non_blocking_data_mem.sv
• generated/basejump/bsg_cache_BaseJumpSTL_bsg_cache_non_blocking_decode.sv
• generated/basejump/bsg_cache_BaseJumpSTL_bsg_cache_non_blocking_miss_fifo.sv
• generated/basejump/bsg_cache_BaseJumpSTL_bsg_cache_to_axi.sv
• generated/basejump/bsg_dataflow_BaseJumpSTL_bsg_flow_counter.sv
• generated/basejump/bsg_dataflow_BaseJumpSTL_bsg_scatter_gather.sv
• generated/basejump/bsg_dataflow_BaseJumpSTL_bsg_sort_stable.sv
• generated/basejump/bsg_link_BaseJumpSTL_bsg_link_source_sync_upstream.sv
• generated/basejump/bsg_mem_BaseJumpSTL_bsg_cam_1r1w_replacement.sv
• generated/basejump/bsg_mem_BaseJumpSTL_bsg_cam_1r1w_unmanaged.sv
• generated/basejump/bsg_mem_BaseJumpSTL_bsg_mem_1rw_sync_mask_write_byte.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_clkbuf.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_counter_overflow_set_en.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_counter_up_down.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_dff.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_idiv_iterative.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_idiv_unsigned_recip.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_mux_butterfly.sv
• generated/basejump/bsg_misc_BaseJumpSTL_bsg_unconcentrate_static.sv
• generated/basejump/bsg_test_BaseJumpSTL_bsg_nonsynth_ramulator_hbm.sv
• generated/basejump/bsg_test_BaseJumpSTL_bsg_nonsynth_sha256.sv
• generated/binary_op/11.4.6--binary_op_wild_eq.sv
• generated/binary_op/11.4.8--binary_op_bit_xnor.sv
• generated/encapsulation/8.18--inherited_prot_from_inside.sv
• generated/encapsulation/8.18--local_from_inside.sv
• generated/hdlconv_std2017/hdlconvertor_std2017_p495.sv
• generated/hdlconv_std2017/hdlconvertor_std2017_p728.sv
• generated/hdlconv_std2017/hdlconvertor_std2017_p729.sv
• generated/integers/6.11--integer_logic.sv
• generated/ivtest/regress-sv_br956_iv.sv
• generated/ivtest/regress-sv_br974a_iv.sv
• generated/ivtest/regress-sv_br_gh177a_iv.sv
• generated/ivtest/regress-sv_br_gh289c_iv.sv
• generated/ivtest/regress-sv_br_gh374_iv.sv
• generated/ivtest/regress-sv_br_gh436_iv.sv
• generated/ivtest/regress-sv_br_gh451_iv.sv
• generated/ivtest/regress-sv_br_gh477_iv.sv
• generated/ivtest/regress-sv_br_gh498_iv.sv
• generated/ivtest/regress-sv_br_gh661b_iv.sv
• generated/ivtest/regress-sv_br_gh756_iv.sv
• generated/ivtest/regress-sv_clkgen_logic_iv.sv
• generated/ivtest/regress-sv_clkgen_net_iv.sv
• generated/ivtest/regress-sv_enum_base_integer_iv.sv
• generated/ivtest/regress-sv_enum_base_none_iv.sv
• generated/ivtest/regress-sv_enum_method_signed1_iv.sv
• generated/ivtest/regress-sv_enum_test8_iv.sv
• generated/ivtest/regress-sv_func_init_var2_iv.sv
• generated/ivtest/regress-sv_implicit_cast1_iv.sv
• generated/ivtest/regress-sv_implicit_cast5_iv.sv
• generated/ivtest/regress-sv_implicit_cast9_iv.sv
• generated/ivtest/regress-sv_logical_short_circuit_iv.sv
• generated/ivtest/regress-sv_module_nonansi_enum2_iv.sv
• generated/ivtest/regress-sv_parameter_override_invalid8_iv.sv
• generated/ivtest/regress-sv_parameter_type2_iv.sv
• generated/ivtest/regress-sv_program_hello_iv.sv
• generated/ivtest/regress-sv_struct_packed_array2_iv.sv
• generated/ivtest/regress-sv_sv_ap_parray3_iv.sv
• generated/ivtest/regress-sv_sv_ap_parray4_iv.sv
• generated/ivtest/regress-sv_sv_array_cassign1_iv.sv
• generated/ivtest/regress-sv_sv_class13_iv.sv
• generated/ivtest/regress-sv_sv_class24_iv.sv
• generated/ivtest/regress-sv_sv_class2_iv.sv
• generated/ivtest/regress-sv_sv_class6_iv.sv
• generated/ivtest/regress-sv_sv_class_extends_scoped_iv.sv
• generated/ivtest/regress-sv_sv_class_localparam_iv.sv
• generated/ivtest/regress-sv_sv_class_property_signed3_iv.sv
• generated/ivtest/regress-sv_sv_class_super4_iv.sv
• generated/ivtest/regress-sv_sv_class_super5_iv.sv
• generated/ivtest/regress-sv_sv_darray_assign1_iv.sv
• generated/ivtest/regress-sv_sv_import_hier_fail2_iv.sv
• generated/ivtest/regress-sv_sv_pkg_class_iv.sv
• generated/ivtest/regress-sv_sv_ps_function4_iv.sv
• generated/ivtest/regress-sv_sv_ps_member_sel2_iv.sv
• generated/ivtest/regress-sv_sv_queue_real_bounded_iv.sv
• generated/ivtest/regress-sv_sv_timeunit_prec3a_iv.sv
• generated/ivtest/regress-sv_sv_typedef_array_base2_iv.sv
• generated/ivtest/regress-sv_sv_typedef_fwd_class_iv.sv
• generated/ivtest/regress-sv_sv_unpacked_port2_iv.sv
• generated/ivtest/regress-sv_sv_var_block_iv.sv
• generated/ivtest/regress-sv_sv_var_task_iv.sv
• generated/ivtest/regress-sv_test_tliteral_iv.sv
• generated/ivtest/regress-synth_basiclatch_iv.sv
• generated/ivtest/regress-synth_blocksynth2_iv.sv
• generated/ivtest/regress-synth_br994_iv.sv
• generated/ivtest/regress-vlg_always3112A_iv.sv
• generated/ivtest/regress-vlg_always311H_iv.sv
• generated/ivtest/regress-vlg_always314B_iv.sv
• generated/ivtest/regress-vlg_always314E_iv.sv
• generated/ivtest/regress-vlg_always314G_iv.sv
• generated/ivtest/regress-vlg_always314I_iv.sv
• generated/ivtest/regress-vlg_always317D_iv.sv
• generated/ivtest/regress-vlg_andnot1_iv.sv
• generated/ivtest/regress-vlg_array_lval_select2_iv.sv
• generated/ivtest/regress-vlg_assign32A_iv.sv
• generated/ivtest/regress-vlg_assign_add_iv.sv
• generated/ivtest/regress-vlg_attrib06_operator_suffix_iv.sv
• generated/ivtest/regress-vlg_automatic_events_iv.sv
• generated/ivtest/regress-vlg_block_only_with_var_def_iv.sv
• generated/ivtest/regress-vlg_br1019_iv.sv
• generated/ivtest/regress-vlg_br1029a_iv.sv
• generated/ivtest/regress-vlg_br931_iv.sv
• generated/ivtest/regress-vlg_br961_iv.sv
• generated/ivtest/regress-vlg_br967_iv.sv
• generated/ivtest/regress-vlg_br_gh19_iv.sv
• generated/ivtest/regress-vlg_br_gh19b_iv.sv
• generated/ivtest/regress-vlg_br_gh330_iv.sv
• generated/ivtest/regress-vlg_br_gh37_iv.sv
• generated/ivtest/regress-vlg_br_gh497e_iv.sv
• generated/ivtest/regress-vlg_br_gh99m_iv.sv
• generated/ivtest/regress-vlg_casex39D_iv.sv
• generated/ivtest/regress-vlg_casez310B_iv.sv
• generated/ivtest/regress-vlg_casez310C_iv.sv
• generated/ivtest/regress-vlg_const3_iv.sv
• generated/ivtest/regress-vlg_contrib84_iv.sv
• generated/ivtest/regress-vlg_dangling_port_iv.sv
• generated/ivtest/regress-vlg_delay2_iv.sv
• generated/ivtest/regress-vlg_disp_parm_iv.sv
• generated/ivtest/regress-vlg_disp_part_iv.sv
• generated/ivtest/regress-vlg_extend_iv.sv
• generated/ivtest/regress-vlg_fscanf_z_warn_iv.sv
• generated/ivtest/regress-vlg_function311B_iv.sv
• generated/ivtest/regress-vlg_function311C_iv.sv
• generated/ivtest/regress-vlg_function9_iv.sv
• generated/ivtest/regress-vlg_idiv3_iv.sv
• generated/ivtest/regress-vlg_include1_iv.sv
• generated/ivtest/regress-vlg_lh_catadd_iv.sv
• generated/ivtest/regress-vlg_macsub_iv.sv
• generated/ivtest/regress-vlg_monitor3_iv.sv
• generated/ivtest/regress-vlg_param_expr_iv.sv
• generated/ivtest/regress-vlg_param_select2_iv.sv
• generated/ivtest/regress-vlg_param_times_iv.sv
• generated/ivtest/regress-vlg_pr1032_iv.sv
• generated/ivtest/regress-vlg_pr136_iv.sv
• generated/ivtest/regress-vlg_pr1455873_iv.sv
• generated/ivtest/regress-vlg_pr1474316_iv.sv
• generated/ivtest/regress-vlg_pr1515168_iv.sv
• generated/ivtest/regress-vlg_pr1570635_iv.sv
• generated/ivtest/regress-vlg_pr1603918_iv.sv
• generated/ivtest/regress-vlg_pr1675789_iv.sv
• generated/ivtest/regress-vlg_pr1690058_iv.sv
• generated/ivtest/regress-vlg_pr1699519_iv.sv
• generated/ivtest/regress-vlg_pr1717361_iv.sv
• generated/ivtest/regress-vlg_pr1845683_iv.sv
• generated/ivtest/regress-vlg_pr1851310_iv.sv
• generated/ivtest/regress-vlg_pr1866215_iv.sv
• generated/ivtest/regress-vlg_pr1892959_iv.sv
• generated/ivtest/regress-vlg_pr1913937_iv.sv
• generated/ivtest/regress-vlg_pr1921332_iv.sv
• generated/ivtest/regress-vlg_pr1932444_iv.sv
• generated/ivtest/regress-vlg_pr1936363_iv.sv
• generated/ivtest/regress-vlg_pr1948110_iv.sv
• generated/ivtest/regress-vlg_pr1956211_iv.sv
• generated/ivtest/regress-vlg_pr1993479_iv.sv
• generated/ivtest/regress-vlg_pr2013758_iv.sv
• generated/ivtest/regress-vlg_pr2030767_iv.sv
• generated/ivtest/regress-vlg_pr2138979c_iv.sv
• generated/ivtest/regress-vlg_pr2138979d_iv.sv
• generated/ivtest/regress-vlg_pr2172606b_iv.sv
• generated/ivtest/regress-vlg_pr2202846a_iv.sv
• generated/ivtest/regress-vlg_pr2202846c_iv.sv
• generated/ivtest/regress-vlg_pr2745281_iv.sv
• generated/ivtest/regress-vlg_pr2823711_iv.sv
• generated/ivtest/regress-vlg_pr2909414_iv.sv
• generated/ivtest/regress-vlg_pr2973532_iv.sv
• generated/ivtest/regress-vlg_pr304_iv.sv
• generated/ivtest/regress-vlg_pr3098439b_iv.sv
• generated/ivtest/regress-vlg_pr3284821_iv.sv
• generated/ivtest/regress-vlg_pr338_iv.sv
• generated/ivtest/regress-vlg_pr3582052_iv.sv
• generated/ivtest/regress-vlg_pr540c_iv.sv
• generated/ivtest/regress-vlg_pr564_iv.sv
• generated/ivtest/regress-vlg_ptest006_iv.sv
• generated/ivtest/regress-vlg_ptest008_iv.sv
• generated/ivtest/regress-vlg_ptest010_iv.sv
• generated/ivtest/regress-vlg_ptest011_iv.sv
• generated/ivtest/regress-vlg_readmemerror_iv.sv
• generated/ivtest/regress-vlg_recursive_func1_iv.sv
• generated/ivtest/regress-vlg_rl_pow_iv.sv
• generated/ivtest/regress-vlg_rptconcat_iv.sv
• generated/ivtest/regress-vlg_rtranif0_iv.sv
• generated/ivtest/regress-vlg_sdf6_iv.sv
• generated/ivtest/regress-vlg_sdw_always2_iv.sv
• generated/ivtest/regress-vlg_sdw_always3_iv.sv
• generated/ivtest/regress-vlg_sdw_function1_iv.sv
• generated/ivtest/regress-vlg_sdw_instmod1_iv.sv
• generated/ivtest/regress-vlg_sdw_param1_iv.sv
• generated/ivtest/regress-vlg_sel_rval_bit_ob_iv.sv
• generated/ivtest/regress-vlg_signed10_iv.sv
• generated/ivtest/regress-vlg_signed9_iv.sv
• generated/ivtest/regress-vlg_string3_iv.sv
• generated/ivtest/regress-vlg_string4_iv.sv
• generated/ivtest/regress-vlg_task_nonansi_real1_iv.sv
• generated/ivtest/regress-vlg_time1_iv.sv
• generated/ivtest/regress-vlg_unary_and_iv.sv
• generated/ivtest/regress-vlg_unary_minus1_iv.sv
• generated/ivtest/regress-vlg_unary_minus_iv.sv
• generated/ivtest/regress-vlg_unary_nand_iv.sv
• generated/ivtest/regress-vlg_varlsfht2_iv.sv
• generated/ivtest/regress-vlg_varlsfht_iv.sv
• generated/operators_sim/11.4.3--div_operator_sim_0.sv
• generated/operators_sim/11.4.3--exp_operator_sim_1.sv
• generated/operators_sim/11.4.3--plus_operator_sim_0.sv
• generated/operators_sim/11.4.3--simple_mod_operator_sim.sv
• generated/operators_sim/11.4.4--ge_operator_sim_1.sv
• generated/operators_sim/11.4.4--simple_lt_operator_sim.sv
• generated/operators_sim/11.4.8--simple_bit_xor_operator_sim.sv
• generated/projf-explore/lib_maths_xc7_projf_clog2_tb.sv
• generated/projf-explore/lib_null_ice40_projf_SB_SPRAM256KA.sv
• generated/simple_logical_operators_sim/11.4.7--simple_and_logical_operator.sv
• generated/trig_functions/20.8--tan.sv
• generated/unary_op/11.4.9--simple_unary_op_nand.sv
• generated/unary_op/11.4.9--simple_unary_op_xor.sv
• generated/unary_op/11.4.9--unary_op_or.sv
• generated/uniquecase/12.5.3--priority_casez.sv
• generated/uniquecase/12.5.3--unique0_casez.sv
• generated/utd-sv/utd-sv_bw_temp_diode.sv
• generated/utd-sv/utd-sv_cpx_buf_p1.sv
• generated/utd-sv/utd-sv_fpu_in2_gt_in1_3b.sv
• generated/utd-sv/utd-sv_functions.sv
• generated/utd-sv/utd-sv_mod-param-dec.sv
• generated/utd-sv/utd-sv_pcx_buf_p0.sv
• generated/utd-sv/utd-sv_std-6.1.2-contassign2.sv
• generated/wildcard_const_operators_sim/11.4.6--wildcard_const_operator_4.sv
• generated/wildcard_operators_sim/11.4.6--wildcard_operator_0.sv
• generated/wildcard_operators_sim/11.4.6--wildcard_operator_6.sv
• generated/wildcard_operators_sim/11.4.6--wildcard_operator_7.sv
• generated/yosys/asicworld_code_hdl_models_clk_div_45.sv
• generated/yosys/asicworld_code_hdl_models_pri_encoder_using_assign.sv
• generated/yosys/asicworld_code_verilog_tutorial_always_example.sv
• generated/yosys/asicworld_code_verilog_tutorial_simple_if.sv
• generated/yosys/memories_read_two_mux.sv
• generated/yosys/memories_shared_ports.sv
• generated/yosys/simple_aes_kexp128.sv
• generated/yosys/simple_const_fold_func.sv
• generated/yosys/simple_forgen02.sv
• generated/yosys/simple_ifdef_2.sv
• generated/yosys/simple_loop_prefix_case.sv
• generated/yosys/simple_sign_part_assign.sv
• generic/class/class_test_21.sv
• generic/class/class_test_27.sv
• generic/class/class_test_29.sv
• generic/class/class_test_4.sv
• generic/class/class_test_58.sv
• generic/iface/iface_class_test_0.sv
• generic/member/class_member_test_12.sv
• generic/number/number_test_33.sv
• generic/number/number_test_51.sv
• generic/number/number_test_67.sv
• generic/number/number_test_70.sv
• generic/typedef/typedef_test_12.sv
• generic/typedef/typedef_test_14.sv
• generic/typedef/typedef_test_19.sv
• generic/typedef/typedef_test_25.sv

[mikeurbach]

Bah sorry @uenoku I didn't realize your PR was open.

[mikeurbach]

I guess the Windows CI check was shown to be flaky already so I'm retrying 😕

But the circt-tests report an short integration tests seem to point to a real issue in circt-verilog... @fabianschuiki does anything ring a bell here?

[fabianschuiki]

Huh this is very weird. I wouldn't expect there to be that many changes in circt-verilog due to the bump. Let me dig…

[fabianschuiki]

The fact that this now triggers an exception is very weird 🤔

terminate called after throwing an instance of 'std::system_error'

And also, why does this not happen on the actual build-and-test runs, only in short integration?

[mikeurbach]

Yeah I am surprised. Maybe it is a different flavor of the wonkiness we saw in the Windows build, now cropping up in Linux?

[fabianschuiki]

Hmmm yeah that could be it. The exception smells a bit like it's some file access that might fail for whatever reson 😢

[fabianschuiki]

Let me rerun the short integration test to see if it's reproducibly failing at the exact same point, or if it fails in a different place.