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FEAT: Added a new class to customize Page Ports and added 2 new properties #6374

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Merged
merged 11 commits into from
Jul 14, 2025
Merged
12 changes: 7 additions & 5 deletions SECURITY.md
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,9 @@ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
-->

## Reporting a vulnerability
# Security Policy

## Reporting a vulnerability

> [!CAUTION]
> Do not use GitHub issues to report any security vulnerabilities.
Expand All @@ -32,7 +34,7 @@ mentioning the repository and the details of your finding. The team will address

Provide the PyAnsys Core team with this information:

- Any specific configuration settings needed to reproduce the problem
- Step-by-step guidance to reproduce the problem
- The exact location of the problematic source code, including tag, branch, commit, or a direct URL
- The potential consequences of the vulnerability, along with a description of how an attacker could take advantage of the issue
- Any specific configuration settings needed to reproduce the problem
- Step-by-step guidance to reproduce the problem
- The exact location of the problematic source code, including tag, branch, commit, or a direct URL
- The potential consequences of the vulnerability, along with a description of how an attacker could take advantage of the issue
1 change: 1 addition & 0 deletions doc/changelog.d/6374.added.md
Original file line number Diff line number Diff line change
@@ -0,0 +1 @@
Added a new class to customize page ports and added 2 new properties
10 changes: 6 additions & 4 deletions src/ansys/aedt/core/application/analysis_nexxim.py
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,8 @@
from ansys.aedt.core.generic.general_methods import pyaedt_function_handler
from ansys.aedt.core.generic.settings import settings
from ansys.aedt.core.modeler.circuits.object_3d_circuit import CircuitComponent
from ansys.aedt.core.modeler.circuits.object_3d_circuit import Excitations
from ansys.aedt.core.modules.boundary.circuit_boundary import CurrentSinSource
from ansys.aedt.core.modules.boundary.circuit_boundary import Excitations
from ansys.aedt.core.modules.boundary.circuit_boundary import PowerIQSource
from ansys.aedt.core.modules.boundary.circuit_boundary import PowerSinSource
from ansys.aedt.core.modules.boundary.circuit_boundary import Sources
Expand Down Expand Up @@ -90,7 +90,7 @@

self._modeler = None
self._post = None
self._internal_excitations = None
self._internal_excitations = {}
self._internal_sources = None
self._configurations = ConfigurationsNexxim(self)
if not settings.lazy_load:
Expand Down Expand Up @@ -366,9 +366,11 @@
>>> oModule.GetExcitations
"""
props = {}

if not self._internal_excitations:
for port in self.excitation_names:
props[port] = Excitations(self, port)
for comp in self.modeler.schematic.components.values():
if comp.name in self.excitation_names:
props[comp.name] = comp

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src/ansys/aedt/core/application/analysis_nexxim.py#L371-L373

Added lines #L371 - L373 were not covered by tests
self._internal_excitations = props
else:
props = self._internal_excitations
Expand Down
11 changes: 9 additions & 2 deletions src/ansys/aedt/core/internal/grpc_plugin_dll_class.py
Original file line number Diff line number Diff line change
Expand Up @@ -204,8 +204,15 @@ def __GetPropAttributes(self):

def __dir__(self):
ret = super().__dir__().copy()
for attrName, _ in self.__GetPropAttributes():
ret.append(attrName)
try:
for attrName, _ in self.__GetPropAttributes().items():
ret.append(attrName)
except Exception:
try:
for attrName, _ in self.__GetPropAttributes():
ret.append(attrName)
except Exception:
return ret
return ret

def __getattr__(self, attrName):
Expand Down
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