Optimize exact-scan MPC threshold primitives - #138
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philsippl
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* perf: optimize exact-scan MPC primitives * perf: fuse exact-scan threshold preparation * feat: add session-affine connection policy * Remove inferior session-affine transport * Remove unused threshold bit calculation * Address PR review feedback * chore: fix dependency security checks
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worldcoin/ampc-common#138 merged; a0b968c4 was its pre-merge head and is not an ancestor of ampc-common main. Pin 11bcd059, the current main head, which also carries the #140 threshold-path allocation reductions. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAbAnQyfsSrWH6UGcRM1FF
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Summary
Why
The CPU linear scanner evaluates every first-eye candidate and needs threshold checks to remain parallel across an entire chunk. The generic lift/multiply/MSB path introduced unnecessary memory traffic and sequential MPC rounds. These primitives expose the GPU-equivalent threshold circuit to the CPU implementation while preserving the existing PRF use and wire semantics.
Consumed by worldcoin/iris-mpc#2347.
Correctness and validation
cargo test -p ampc-actor-utils: 74 passed, 0 failedgit diff --check origin/main...HEADEnd-to-end performance
Measured through the dependent Iris MPC implementation with batch size 1 on three AWS
r8g.24xlargeinstances:These are application-level results for the combined AMPC and Iris changes, not an isolated AMPC microbenchmark. Detailed benchmark context is recorded in worldcoin/iris-mpc#2347.