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Move call location of ClockRRGraphBuilder and use alloc_and_load_edges. #1081

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Feb 3, 2020
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5 changes: 5 additions & 0 deletions vpr/src/route/check_rr_graph.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,11 @@ void check_rr_graph(const t_graph_type graph_type,
continue;
}

// Virtual clock network sink is special, ignore.
if (device_ctx.virtual_clock_network_root_idx == int(inode)) {
continue;
}

t_rr_type rr_type = device_ctx.rr_nodes[inode].type();
int num_edges = device_ctx.rr_nodes[inode].num_edges();

Expand Down
58 changes: 35 additions & 23 deletions vpr/src/route/clock_connection_builders.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ void RoutingToClockConnection::set_switch_location(int x, int y) {
switch_location.y = y;
}

void RoutingToClockConnection::set_switch(int rr_switch_index) {
rr_switch_idx = rr_switch_index;
void RoutingToClockConnection::set_switch(int arch_switch_index) {
arch_switch_idx = arch_switch_index;
}

void RoutingToClockConnection::set_fc_val(float fc_val) {
Expand All @@ -39,18 +39,25 @@ void RoutingToClockConnection::set_fc_val(float fc_val) {
* RoutingToClockConnection (member functions)
*/

void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_graph) {
size_t RoutingToClockConnection::estimate_additional_nodes() {
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Add a comment to note that routing to clock connections create a virtual sink which is why we are returning one node to be allocated here

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Done

// 1 rr node is being added as the virtual clock sink.
return 1;
}

void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) {
// Initialize random seed
// Must be done during every call in order for restored rr_graphs after a binary
// search to be consistent
std::srand(seed);

auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
auto& device_ctx = g_vpr_ctx.device();
auto& rr_node_indices = device_ctx.rr_node_indices;

int virtual_clock_network_root_idx = create_virtual_clock_network_sink_node(switch_location.x, switch_location.y);
device_ctx.virtual_clock_network_root_idx = virtual_clock_network_root_idx;
{
auto& mut_device_ctx = g_vpr_ctx.mutable_device();
mut_device_ctx.virtual_clock_network_root_idx = virtual_clock_network_root_idx;
}

// rr_node indices for x and y channel routing wires and clock wires to connect to
auto x_wire_indices = get_rr_node_chan_wires_at_location(
Expand All @@ -68,18 +75,18 @@ void RoutingToClockConnection::create_switches(const ClockRRGraphBuilder& clock_
// Connect to x-channel wires
unsigned num_wires_x = x_wire_indices.size() * fc;
for (size_t i = 0; i < num_wires_x; i++) {
rr_nodes[x_wire_indices[i]].add_edge(clock_index, rr_switch_idx);
clock_graph.add_edge(rr_edges_to_create, x_wire_indices[i], clock_index, arch_switch_idx);
}

// Connect to y-channel wires
unsigned num_wires_y = y_wire_indices.size() * fc;
for (size_t i = 0; i < num_wires_y; i++) {
rr_nodes[y_wire_indices[i]].add_edge(clock_index, rr_switch_idx);
clock_graph.add_edge(rr_edges_to_create, y_wire_indices[i], clock_index, arch_switch_idx);
}

// Connect to virtual clock sink node
// used by the two stage router
rr_nodes[clock_index].add_edge(virtual_clock_network_root_idx, rr_switch_idx);
clock_graph.add_edge(rr_edges_to_create, clock_index, virtual_clock_network_root_idx, arch_switch_idx);
}
}

Expand Down Expand Up @@ -122,8 +129,8 @@ void ClockToClockConneciton::set_to_clock_switch_point_name(std::string switch_p
to_switch = switch_point_name;
}

void ClockToClockConneciton::set_switch(int rr_switch_index) {
rr_switch_idx = rr_switch_index;
void ClockToClockConneciton::set_switch(int arch_switch_index) {
arch_switch_idx = arch_switch_index;
}

void ClockToClockConneciton::set_fc_val(float fc_val) {
Expand All @@ -134,10 +141,12 @@ void ClockToClockConneciton::set_fc_val(float fc_val) {
* ClockToClockConneciton (member functions)
*/

void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_graph) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& grid = device_ctx.grid;
auto& rr_nodes = device_ctx.rr_nodes;
size_t ClockToClockConneciton::estimate_additional_nodes() {
return 0;
}

void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) {
auto& grid = clock_graph.grid();

auto to_locations = clock_graph.get_switch_locations(to_clock, to_switch);

Expand Down Expand Up @@ -179,7 +188,7 @@ void ClockToClockConneciton::create_switches(const ClockRRGraphBuilder& clock_gr
if (from_itter == from_rr_node_indices.end()) {
from_itter = from_rr_node_indices.begin();
}
rr_nodes[*from_itter].add_edge(to_index, rr_switch_idx);
clock_graph.add_edge(rr_edges_to_create, *from_itter, to_index, arch_switch_idx);
from_itter++;
}
}
Expand All @@ -199,8 +208,8 @@ void ClockToPinsConnection::set_clock_switch_point_name(
switch_point_name = connection_switch_point_name;
}

void ClockToPinsConnection::set_switch(int rr_switch_index) {
rr_switch_idx = rr_switch_index;
void ClockToPinsConnection::set_switch(int arch_switch_index) {
arch_switch_idx = arch_switch_index;
}

void ClockToPinsConnection::set_fc_val(float fc_val) {
Expand All @@ -211,11 +220,14 @@ void ClockToPinsConnection::set_fc_val(float fc_val) {
* ClockToPinsConnection (member functions)
*/

void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_graph) {
auto& device_ctx = g_vpr_ctx.mutable_device();
auto& rr_nodes = device_ctx.rr_nodes;
size_t ClockToPinsConnection::estimate_additional_nodes() {
return 0;
}

void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) {
auto& device_ctx = g_vpr_ctx.device();
auto& rr_node_indices = device_ctx.rr_node_indices;
auto& grid = device_ctx.grid;
auto& grid = clock_graph.grid();

for (size_t x = 0; x < grid.width(); x++) {
for (size_t y = 0; y < grid.height(); y++) {
Expand Down Expand Up @@ -290,7 +302,7 @@ void ClockToPinsConnection::create_switches(const ClockRRGraphBuilder& clock_gra

//Create edges depending on Fc
for (size_t i = 0; i < clock_network_indices.size() * fc; i++) {
rr_nodes[clock_network_indices[i]].add_edge(clock_pin_node_idx, rr_switch_idx);
clock_graph.add_edge(rr_edges_to_create, clock_network_indices[i], clock_pin_node_idx, arch_switch_idx);
}
}
}
Expand Down
25 changes: 15 additions & 10 deletions vpr/src/route/clock_connection_builders.h
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@

#include "clock_fwd.h"

#include "rr_graph2.h"
#include "rr_graph_clock.h"

class ClockRRGraphBuilder;
Expand All @@ -26,15 +27,16 @@ class ClockConnection {
/*
* Member functions
*/
virtual void create_switches(const ClockRRGraphBuilder& clock_graph) = 0;
virtual void create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) = 0;
virtual size_t estimate_additional_nodes() = 0;
};

class RoutingToClockConnection : public ClockConnection {
private:
std::string clock_to_connect_to;
std::string switch_point_name;
Coordinates switch_location;
int rr_switch_idx;
int arch_switch_idx;
float fc;

int seed = 101;
Expand All @@ -46,14 +48,15 @@ class RoutingToClockConnection : public ClockConnection {
void set_clock_name_to_connect_to(std::string clock_name);
void set_clock_switch_point_name(std::string clock_switch_point_name);
void set_switch_location(int x, int y);
void set_switch(int rr_switch_index);
void set_switch(int arch_switch_index);
void set_fc_val(float fc_val);

/*
* Member functions
*/
/* Connects the inter-block routing to the clock source at the specified coordinates */
void create_switches(const ClockRRGraphBuilder& clock_graph);
void create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) override;
size_t estimate_additional_nodes() override;
int create_virtual_clock_network_sink_node(int x, int y);
};

Expand All @@ -63,7 +66,7 @@ class ClockToClockConneciton : public ClockConnection {
std::string from_switch;
std::string to_clock;
std::string to_switch;
int rr_switch_idx;
int arch_switch_idx;
float fc;

public:
Expand All @@ -74,14 +77,15 @@ class ClockToClockConneciton : public ClockConnection {
void set_from_clock_switch_point_name(std::string switch_point_name);
void set_to_clock_name(std::string clock_name);
void set_to_clock_switch_point_name(std::string switch_point_name);
void set_switch(int rr_switch_index);
void set_switch(int arch_switch_index);
void set_fc_val(float fc_val);

/*
* Member functions
*/
/* Connects a clock tap to a clock source */
void create_switches(const ClockRRGraphBuilder& clock_graph);
void create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) override;
size_t estimate_additional_nodes() override;
};

/* This class currently only supports Clock Network to clock pin connection.
Expand All @@ -90,7 +94,7 @@ class ClockToPinsConnection : public ClockConnection {
private:
std::string clock_to_connect_from;
std::string switch_point_name;
int rr_switch_idx;
int arch_switch_idx;
float fc;

public:
Expand All @@ -99,14 +103,15 @@ class ClockToPinsConnection : public ClockConnection {
*/
void set_clock_name_to_connect_from(std::string clock_name);
void set_clock_switch_point_name(std::string connection_switch_point_name);
void set_switch(int rr_switch_index);
void set_switch(int arch_switch_index);
void set_fc_val(float fc_val);

/*
* Member functions
*/
/* Connects the clock tap to block pins */
void create_switches(const ClockRRGraphBuilder& clock_graph);
void create_switches(const ClockRRGraphBuilder& clock_graph, t_rr_edge_info_set* rr_edges_to_create) override;
size_t estimate_additional_nodes() override;
};

#endif
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