stlink-lib: Disarm vector-catch-on-reset on debug detach#1500
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Nightwalker-87 merged 1 commit intoJul 10, 2026
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st-flash --connect-under-reset arms DEMCR.VC_CORERESET (halt-on-reset) via stlink_soft_reset(). That bit lives in the debug power domain and survives NRST, so once armed the core halts at its reset vector on *every* reset -- including NVIC_SystemReset() from firmware and the board's reset button -- which makes a freshly flashed board appear bricked until it is power-cycled. stlink_exit_debug_mode() only wrote DHCSR.DBGKEY on detach and never cleared the vector catch. Worse, that write (and thus any cleanup) was gated behind core_stat != TARGET_RESET, which is precisely the state connect-under-reset leaves the target in -- so the cleanup was skipped exactly when it was needed. Split the two: keep the DBGKEY write gated on core_stat, but always disarm DEMCR.VC_CORERESET (when a target was identified), preserving the other DEMCR bits and clearing the stale DFSR.VCATCH status. The DEMCR read return already guards against a dead debug link; a failed disarm write is logged via WLOG rather than failing the detach. This mirrors the existing AP1 flash-size fallback, which already disarms VC_CORERESET. Signed-off-by: James Walmsley <james@fullfat-fs.co.uk>
Nightwalker-87
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Jul 10, 2026
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st-flash --connect-under-reset arms DEMCR.VC_CORERESET (halt-on-reset) via stlink_soft_reset(). That bit lives in the debug power domain and survives NRST, so once armed the core halts at its reset vector on every reset -- including NVIC_SystemReset() from firmware and the board's reset button -- which makes a freshly flashed board appear bricked until it is power-cycled.
stlink_exit_debug_mode() only wrote DHCSR.DBGKEY on detach and never cleared the vector catch. Worse, that write (and thus any cleanup) was gated behind core_stat != TARGET_RESET, which is precisely the state connect-under-reset leaves the target in -- so the cleanup was skipped exactly when it was needed.
Split the two: keep the DBGKEY write gated on core_stat, but always disarm DEMCR.VC_CORERESET (when a target was identified), preserving the other DEMCR bits and clearing the stale DFSR.VCATCH status. The DEMCR read return already guards against a dead debug link; a failed disarm write is logged via WLOG rather than failing the detach.
This mirrors the existing AP1 flash-size fallback, which already disarms VC_CORERESET.
(Closes #1489)