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10 changes: 5 additions & 5 deletions CMakeCacheR.txt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# This is the CMakeCache file.
# For build in directory: /home/park/git_base/Re-implemented-CPSim
# For build in directory: /home/rubis/Re-implemented-CPSim
# It was generated by CMake: /usr/bin/cmake
# You can edit this file to change values found and used by cmake.
# If you do not want to change any of the values, simply exit the editor.
Expand Down Expand Up @@ -182,10 +182,10 @@ CMAKE_STRIP:FILEPATH=/usr/bin/strip
CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE

//Value Computed by CMake
CPSim_BINARY_DIR:STATIC=/home/park/git_base/Re-implemented-CPSim
CPSim_BINARY_DIR:STATIC=/home/rubis/Re-implemented-CPSim

//Value Computed by CMake
CPSim_SOURCE_DIR:STATIC=/home/park/git_base/Re-implemented-CPSim
CPSim_SOURCE_DIR:STATIC=/home/rubis/Re-implemented-CPSim


########################
Expand All @@ -195,7 +195,7 @@ CPSim_SOURCE_DIR:STATIC=/home/park/git_base/Re-implemented-CPSim
//ADVANCED property for variable: CMAKE_AR
CMAKE_AR-ADVANCED:INTERNAL=1
//This is the directory where this CMakeCache.txt was created
CMAKE_CACHEFILE_DIR:INTERNAL=/home/park/git_base/Re-implemented-CPSim
CMAKE_CACHEFILE_DIR:INTERNAL=/home/rubis/Re-implemented-CPSim
//Major version of cmake used to create the current loaded cache
CMAKE_CACHE_MAJOR_VERSION:INTERNAL=3
//Minor version of cmake used to create the current loaded cache
Expand Down Expand Up @@ -266,7 +266,7 @@ CMAKE_GENERATOR_PLATFORM:INTERNAL=
CMAKE_GENERATOR_TOOLSET:INTERNAL=
//Source directory with the top level CMakeLists.txt file for this
// project
CMAKE_HOME_DIRECTORY:INTERNAL=/home/park/git_base/Re-implemented-CPSim
CMAKE_HOME_DIRECTORY:INTERNAL=/home/rubis/Re-implemented-CPSim
//Install .so files without execute permission.
CMAKE_INSTALL_SO_NO_EXE:INTERNAL=1
//ADVANCED property for variable: CMAKE_LINKER
Expand Down
2 changes: 2 additions & 0 deletions CPSim_GUI/bin/.gitignore
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@@ -0,0 +1,2 @@
/model/
/org/
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Original file line number Diff line number Diff line change
Expand Up @@ -404,7 +404,7 @@ public boolean CreateRawData(ExecutionEvent event) {
*/

String filepath = getCPSIMenv() +"/"+ rawdata_xml;
//String filepath = "/home/park/"+rawdata_xml;
//String filepath = "/home/rubis/"+rawdata_xml;
File resultFile = new File(filepath);
StreamResult result2 = new StreamResult(new FileOutputStream(resultFile));

Expand Down
2 changes: 1 addition & 1 deletion Config
Original file line number Diff line number Diff line change
Expand Up @@ -4,4 +4,4 @@ global_offset_start=
global_offset_end=
global_offset_interval=
running_time=
doxygen_symbol_path=/home/park
doxygen_symbol_path=/home/rubis
4 changes: 2 additions & 2 deletions DoxyfileConfiguration
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ PROJECT_LOGO =
# entered, it will be relative to the location where doxygen was started. If
# left blank the current directory will be used.

OUTPUT_DIRECTORY = /home/park/git_base/Re-implemented-CPSim/Documentation
OUTPUT_DIRECTORY = /home/rubis/Re-implemented-CPSim/Documentation

# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
# directories (in 2 levels) under the output directory of each output format and
Expand Down Expand Up @@ -790,7 +790,7 @@ WARN_LOGFILE =
# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
# Note: If this tag is empty the current directory is searched.

INPUT = /home/park/git_base/Re-implemented-CPSim
INPUT = /home/rubis/Re-implemented-CPSim

# This tag can be used to specify the character encoding of the source files
# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
Expand Down
26 changes: 13 additions & 13 deletions Log/CPU_info.log
Original file line number Diff line number Diff line change
@@ -1,25 +1,25 @@
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 1
Core(s) per socket: 4
CPU(s): 12
On-line CPU(s) list: 0-11
Thread(s) per core: 2
Core(s) per socket: 6
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 94
Model name: Intel(R) Core(TM) i5-6400 CPU @ 2.70GHz
Stepping: 3
CPU MHz: 3055.726
CPU max MHz: 3300.0000
Model: 165
Model name: Intel(R) Core(TM) i7-10750H CPU @ 2.60GHz
Stepping: 2
CPU MHz: 3703.040
CPU max MHz: 5000.0000
CPU min MHz: 800.0000
BogoMIPS: 5399.81
BogoMIPS: 5199.98
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 6144K
NUMA node0 CPU(s): 0-3
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d
L3 cache: 12288K
NUMA node0 CPU(s): 0-11
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp pku ospke md_clear flush_l1d arch_capabilities
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