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32bit_Verilog_CPU
32bit_Verilog_CPU Public32 bit multi-cycle CPU and UART module built in Verilog.
Verilog
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Journey_Audio_Analyzer
Journey_Audio_Analyzer PublicAudio analyzer circuit design and fabrication that blinks two LED's corresponding to the amount of low and high frequency content in a song. High and low-pass filters were specifically designed bas…
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Whistleblower_App
Whistleblower_App PublicPython/Django web app that allows the reporting and reviewing of on-grounds events and incidents.
Python
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AlecTraas/computational-geo-lab
AlecTraas/computational-geo-lab PublicA repository for the Computational Geometry group of the UVA Geometry Lab, Spring 2024.
Jupyter Notebook
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DutyCyclists
DutyCyclists PublicUndergraduate engineering capstone project. Developing an external radio add-on to automatically send GPS location at end of normal transmission and regular intervals. At a central location, GPS wi…
C
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