Add support for riscv devices - #2024
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Add a RISC-V debug stack: the JTAG DTM, DMI, debug module (abstract commands, program buffer, system bus access), core, CSR loader, triggers, and semihosting, plus a RISC-V target and session. Move CoreArchitecture out of the coresight core into an architecture-neutral base that the ARM and RISC-V cores both inherit, and add a create_semihost_agent factory plus gdb_regnum on CoreRegister so the right agent and register naming are picked without caller conditionals. Route SemihostAgent construction through that factory in the gdbserver and the run subcommand. Fix the RSP unescape path to round-trip escaped bytes correctly (the old list-of-int path mangled them), raise the GDB packet size so the RISC-V register XML fits in one packet, and run a VERIFY flash init before host memory reads for the window after reset where the flash controller is not configured yet. Add Capability.RESET_ASSERT to the probe base class so callers can tell whether assert_reset() actually drives nRESET; the RISC-V reset path uses it to gate its hardware-SRST prelude. Add a JTAG batch path through the CMSIS-DAP probe stack so the RISC-V JTAG DTM can send sequences in bulk, and make the command shell and the clock-frequency value work with cores that have no AP. Co-Authored-By: Claude Code & GLM Signed-off-by: Ryan QIAN <jianghao.qian@outlook.com>
Add an FTDI FT2232 debug probe driver that uses MPSSE for JTAG, so RISC-V debug works on boards wired to an FTDI interface. Register the probe as a pyocd.probe entry point and add an ftdi extra that pulls in pyftdi. Co-Authored-By: Claude Code & GLM Signed-off-by: Ryan QIAN <jianghao.qian@outlook.com>
Add the HPMicro target subtree and register the targets as builtin RISCVTarget subclasses. SoC part targets: - hpm53x0, hpm53x1 (HPM5300) - hpm5ex0, hpm5ex1 (HPM5E00) - hpm62x0, hpm62x4 (HPM6200, dual-core) - hpm63x0, hpm63x4 (HPM6300) - hpm67x0, hpm67x4 (HPM6700, dual-core) - hpm68x0 (HPM6800) - hpm6ex0 (HPM6E00, dual-core) - hpm6px0, hpm6px1 (HPM6P00, dual-core) Board targets: - hpm5300evk, hpm5301evklite - hpm5e00evk - hpm6200evk - hpm6300evk - hpm6750evk2, hpm6750evkmini - hpm6800evk - hpm6e00evk - hpm6p00evk Also add the XPI flash adapter, FLM algo builder, and manifest-driven blob loader, and include the blob and manifest files in the package data so they install with the package. Co-Authored-By: Claude Code & GLM Signed-off-by: Ryan QIAN <jianghao.qian@outlook.com>
Add user-facing docs for the RISC-V work: the README and target_support overview of the RISC-V debug architecture and JTAG transport; configuration examples; the debug_probes list of supported probe classes; terminology for DMI, DM, hart, and SBA; and the builtin-targets catalog of the HPMicro part and board types. Co-Authored-By: Claude Code & GLM Signed-off-by: Ryan QIAN <jianghao.qian@outlook.com>
…r client detach The gdbserver auto-resumes a halted target when the last GDB client disconnects. The resume_on_disconnect session option (default True, no behavior change) can be set to False to skip the auto-resume and leave the target halted. Co-Authored-By: Claude Code & GLM Signed-off-by: Ryan QIAN <jianghao.qian@outlook.com>
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