Reliable fifo

[micprog]

Add an implementation of a reliable FIFO, with ECC-protected state and TMR-controlled signalling.

[yvantor]

Hey @micprog thank you for the review request! I will take a look tomorrow morning if you don't mind :)

[yvantor]

I think it looks quite good overall! Just a question which is more for curiosity. Do you see a particular advantage in voting before the flip flops (which I understand is the default for both the reliable fifo and rr_tree)? By heart I would have gone straight with voting after the flops, but probably I am just missing a step.
Approved in any case, nice job!

[micprog]

Thanks for the review!

I think it looks quite good overall! Just a question which is more for curiosity. Do you see a particular advantage in voting before the flip flops (which I understand is the default for both the reliable fifo and rr_tree)? By heart I would have gone straight with voting after the flops, but probably I am just missing a step. Approved in any case, nice job!

There was not much consideration put into the default status of the voter position, I decided to leave the voter position for a future exploration, enabling the feature without fully investigating which option is better. I believe this should be decided based on the timing of the path, allowing for modification in critical configurations. Nonetheless, both combinational and register faults are supported in this design, so both positions of the voters will yield fault-functional results.

[yvantor]

Thanks for the review!

I think it looks quite good overall! Just a question which is more for curiosity. Do you see a particular advantage in voting before the flip flops (which I understand is the default for both the reliable fifo and rr_tree)? By heart I would have gone straight with voting after the flops, but probably I am just missing a step. Approved in any case, nice job!

There was not much consideration put into the default status of the voter position, I decided to leave the voter position for a future exploration, enabling the feature without fully investigating which option is better. I believe this should be decided based on the timing of the path, allowing for modification in critical configurations. Nonetheless, both combinational and register faults are supported in this design, so both positions of the voters will yield fault-functional results.

Makes perfect sense, thank you!