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@marqueslanauja marqueslanauja commented Nov 21, 2025

Please check if the PR fulfills these requirements

  • The commit message follows our guidelines
  • Tests for the changes have been added (for bug fixes / features)
  • Docs have been added / updated (for bug fixes / features)
  • A PR or issue has been opened in all impacted repositories (if any)

Does this PR already have an issue describing the problem?

fixes #3560

What kind of change does this PR introduce?

Bug fix

What is the current behavior?

When a model is imported in busBreaker level, busbar sections are not imported. As a result, voltage regulating terminals defined on busbar sections are ignored, and the voltage regulating control is localized by setting the generator terminal as the regulating terminal.

What is the new behavior (if this is a feature change)?

When a nodeBreaker model is imported as busBreaker and voltage regulating controls are defined on busbar sections, we attempt to identify an equivalent IIDM terminal that is connected to the busbar section through switches.

The method RegulatingTerminalMapper.findSwitchCgmesTerminalIdForConnectivityNode is a bit cpu intensive but it will only be used when a nodeBreaker model is imported as busBreaker and voltage regulating terminals are defined on busbar sections

Does this PR introduce a breaking change or deprecate an API?

  • Yes
  • No

If yes, please check if the following requirements are fulfilled

  • The Breaking Change or Deprecated label has been added
  • The migration steps are described in the following section

What changes might users need to make in their application due to this PR? (migration steps)

Other information:

@sonarqubecloud
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@marqueslanauja marqueslanauja marked this pull request as ready for review November 21, 2025 16:09
@jeandemanged
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Hi @marqueslanauja ,
After some testing on real data (pan-EU CGM):

  • performance is an issue: time to import increases from 1'18 to 1'56. And only for 9 new regulating terminals properly identified.
  • I am not sure if I understand the implemented logic well, it seems it looks only "one switch away ?" Below a picture of my real case where a regulating terminal is still not identified, causing load flow divergence. The generator on top right regulates busbar section "1.1". The disconnectors are not retained, the breakers are - in case it matters.
image image

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CGMES: Voltage Regulation on BusBarSection improperly imported for Bus/Branch model

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