VimHDL

Vim functions for VHDL.

Functions

Indent

Indent the right side of VHDL lines, whether they are delimited by :, <= or =>.

Example

signal sig0        : std_logic;
signal signal1 : std_logic;
signal signaltwo : std_logic_vector(1 downto 0);

Into

signal sig0       : std_logic;
signal signal1    : std_logic;
signal signaltwo  : std_logic_vector(1 downto 0);

Mapping

vmap YourMap <plug>(VimHDLIndent)

Installation

Clone into ~/.vim/pack/*/start/