Implementation of basic data flow analysis for PowerPC

[stravant]

Implement basic data flow analysis, showing known values in place of registers where we have more information about the contents of the register available.

Features

• Currently implemented for PPC assembly, but designed the approach in a way that other Arch impls could implement it as well.
• Shows float / double / int constant values inline where they are known.
• Shows parameters, inferred from what registers have their value read before being written.
• Includes checkbox for setting to toggle between raw assembly and assembly with known data flow values swapped in.

Settings

The PR includes two additional settings, analyzeDataFlow and showDataFlow

• analyzeDataFlow defaults to false and gates the whole feature: No analysis is done unless this setting is enabled. It is currently exposed as "(Experimental) Perform data flow analysis" under Arch Settings -> PowerPC. It's not prepended with "ppc." because I think this should be a general setting that could apply to all arches, I just put it under PowerPC because it only applies to that so far.

• showDataFlow defaults to true and shows the data flow results in place of register names if analyzeDataFlow was enabled and there are data flow results for the argument in question. This is exposed as checkbox at the top of the diff view in the case when analyzeDataFlow is enabled.

[encounter]

This is awesome work, thanks so much! Very interested in seeing this continue to improve and replace the pooled data impl eventually. I made a few minor tweaks (input_r3 -> in_r3), but the rest looks super solid.