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Detailed description

  • This is a minor non-code feature (more LUT entries).
  • The existing problem is BMP practically being able to scan and detect some Aarch64 SoCs but refusing to elaborate further.
  • This PR solves it by registering more known CoreSight and Debug IDs as found on Raspberry/Broadcom RPi3B BCM2837 (JTAG-only) and Rockchip RK3568 (SWD-only).

Actual Aarch64 debug is not possible at this point yet, one of the issues is you can't halt ARMv8-A via the Processor Debug Unit page as on ARMv7-A/R, but the associated CTI may be used instead. So I add the CTI IDs (0x14, 0x1a14) to help that.

BMP flash impact should not be large because Cortex-A is disabled by default. However, arm_component_lut[] is not partially gated on that.

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