Fetch stage #12
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Fetch stage #12
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simple implementation of the memory module, using registers inside FPGA. might use on-chip memory in the future
TheDeepestSpace
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@joon2022park hey, I excluded the devcontainer stuff from this PR, should be easier to review. |
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The WIDTH parameter might need to be specified at the declaration line
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This is a rough implementation of the fetch stage.
At the time of writing this is built on top of #7 (✅) #9 (✅) and
#10, so we'll probably need to merge these first.