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Ulysses

Open-source flight controller firmware for UBC Rocket's experimental VTOL platform

Ulysses powers UBC Rocket's Coaxial Counter-Rotating Vertical Take-off and Landing Drone — a testbed designed for developing and validating advanced rocket flight control algorithms in real-world conditions.

Project Plan

The project is a multi-phase plan, with the goal of a fully-featured prototype capable of returning to a specified point when dropped from a high altitude by 2027. The goal for the 2025 - 2026 academic year is as follows:

Phase Deliverables Planned Completion
Phase 1 Prototype capable of moving up, hovering, and landing Jan 2026
Phase 2 Prototype capable of moving along a horizontal plane May 2026
Phase 3 Swapping from a PID-based control system to an MPC system; FPGA system; general polishing LC 2026

System Architecture

The freeRTOS project is setup with three main tasks.

Task Priority Status
Radio Communication (sending + receiving) Low WIP
Motor Control High WIP
Sensor Fusion High WIP

Sensor data acquisition is handled asynchronously using DMA, so no dedicated polling task is required.

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Open-source flight controller firmware for UBC Rocket's experimental VTOL platform

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