SERIE_1

info.yaml

@@ -1,56 +1,49 @@
-# Tiny Tapeout project information
+## Tiny Tapeout project information
 project:
-  title:        ""      # Project title
-  author:       ""      # Your name
-  discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
-  description:  ""      # One line description of what your project does
-  language:     "Verilog" # other examples include SystemVerilog, Amaranth, VHDL, etc
-  clock_hz:     0       # Clock frequency in Hz (or 0 if not applicable)
+  title: "8-bit ALU with Prefix Adder"
+  author: ""  # Add your name here
+  discord: ""  # Add your Discord username if desired
+  description: "8-bit ALU with Kogge-Stone prefix adder supporting 8 operations"
+  language: "Verilog"
+  clock_hz: 0  # Combinational design
 
-  # How many tiles your design occupies? A single tile is about 167x108 uM.
-  tiles: "1x1"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
+  tiles: "1x1"  # Assuming your design fits in 1 tile
 
-  # Your top module name must start with "tt_um_". Make it unique by including your github username:
-  top_module:  "tt_um_example"
+  top_module: "tt_um_alu_prefix"  # Change to your preferred name
 
-  # List your project's source files here.
-  # Source files must be in ./src and you must list each source file separately, one per line.
-  # Don't forget to also update `PROJECT_SOURCES` in test/Makefile.
   source_files:
-    - "project.v"
+    - "project.v"  # Your main design file
 
-# The pinout of your project. Leave unused pins blank. DO NOT delete or add any pins.
-# This section is for the datasheet/website. Use descriptive names (e.g., RX, TX, MOSI, SCL, SEG_A, etc.).
 pinout:
-  # Inputs
-  ui[0]: ""
-  ui[1]: ""
-  ui[2]: ""
-  ui[3]: ""
-  ui[4]: ""
-  ui[5]: ""
-  ui[6]: ""
-  ui[7]: ""
+  # Inputs (A operand)
+  ui[0]: "A[0]"
+  ui[1]: "A[1]"
+  ui[2]: "A[2]"
+  ui[3]: "A[3]"
+  ui[4]: "A[4]"
+  ui[5]: "A[5]"
+  ui[6]: "A[6]"
+  ui[7]: "A[7]"
 
-  # Outputs
-  uo[0]: ""
-  uo[1]: ""
-  uo[2]: ""
-  uo[3]: ""
-  uo[4]: ""
-  uo[5]: ""
-  uo[6]: ""
-  uo[7]: ""
+  # Outputs (Result)
+  uo[0]: "RESULT[0]"
+  uo[1]: "RESULT[1]"
+  uo[2]: "RESULT[2]"
+  uo[3]: "RESULT[3]"
+  uo[4]: "RESULT[4]"
+  uo[5]: "RESULT[5]"
+  uo[6]: "RESULT[6]"
+  uo[7]: "RESULT[7]"
 
-  # Bidirectional pins
-  uio[0]: ""
-  uio[1]: ""
-  uio[2]: ""
-  uio[3]: ""
-  uio[4]: ""
-  uio[5]: ""
-  uio[6]: ""
-  uio[7]: ""
+  # Bidirectional pins (B operand and control)
+  uio[0]: "B[0]"
+  uio[1]: "B[1]"
+  uio[2]: "B[2]"
+  uio[3]: "B[3]"
+  uio[4]: "B[4]"
+  uio[5]: "B[5]"
+  uio[6]: "B[6]"
+  uio[7]: "OP_SEL[2:0]"  # Using 3 bits for operation selection
 
 # Do not change!
 yaml_version: 6

src/ALU.v

@@ -0,0 +1,45 @@
+// ALU with 8-bit Prefix Adder
+module ALU (
+    input [7:0] A, B,         // 8-bit operands
+    input [2:0] ALU_Sel,      // Operation selector
+    output reg [7:0] ALU_Out, // 8-bit result
+    output Zero               // Zero flag
+);
+    // Prefix adder connection
+    wire [7:0] sum;
+    wire cout;
+    PrefixAdder8 prefix_adder (
+        .A(A),
+        .B(B),
+        .Sum(sum),
+        .Cout(cout)
+    );
+
+    // Subtraction is implemented as A + (~B) + 1
+    wire [7:0] sub_result;
+    wire sub_cout;
+    PrefixAdder8 subtractor (
+        .A(A),
+        .B(~B),
+        .Sum(sub_result),
+        .Cout(sub_cout)
+    );
+
+    // Zero flag
+    assign Zero = (ALU_Out == 8'b0);
+
+    // Operation selection
+    always @(*) begin
+        case(ALU_Sel)
+            3'b000: ALU_Out = sum;               // Addition
+            3'b001: ALU_Out = sub_result;        // Subtraction
+            3'b010: ALU_Out = A & B;             // AND
+            3'b011: ALU_Out = A | B;             // OR
+            3'b100: ALU_Out = A ^ B;             // XOR
+            3'b101: ALU_Out = A << 1;            // Shift left
+            3'b110: ALU_Out = A >> 1;            // Shift right
+            3'b111: ALU_Out = (A < B) ? 1 : 0;   // Comparison
+            default: ALU_Out = 8'b0;
+        endcase
+    end
+endmodule

src/prefixx_8bits.v

@@ -0,0 +1,75 @@
+module PrefixAdder8 (
+    input  [7:0] A, B,
+    output [7:0] Sum,
+    output       Cout
+);
+    // Señales Generate (G) y Propagate (P)
+    wire [7:0] G, P;
+    assign G = A & B;  // Generate
+    assign P = A ^ B;  // Propagate
+
+    // Wires para el cálculo prefix (3 niveles para 8 bits)
+    wire [7:0] G_level [2:0];  // Niveles del árbol prefix
+    wire [7:0] P_level [2:0];  
+
+    // --- Inicialización ---
+    assign G_level[0] = G;
+    assign P_level[0] = P;
+
+    // ========== Árbol Prefix Kogge-Stone ==========
+    // Nivel 1: Span 1 (combina bits adyacentes)
+    assign G_level[1][0] = G_level[0][0];
+    assign P_level[1][0] = P_level[0][0];
+    genvar i;
+    generate
+        for (i = 1; i < 8; i = i + 1) begin : level1
+            assign G_level[1][i] = G_level[0][i] | (P_level[0][i] & G_level[0][i-1]);
+            assign P_level[1][i] = P_level[0][i] & P_level[0][i-1];
+        end
+    endgenerate
+
+    // Nivel 2: Span 2 (combina cada 2 bits)
+    assign G_level[2][0] = G_level[1][0];
+    assign P_level[2][0] = P_level[1][0];
+    assign G_level[2][1] = G_level[1][1];
+    assign P_level[2][1] = P_level[1][1];
+    generate
+        for (i = 2; i < 8; i = i + 1) begin : level2
+            assign G_level[2][i] = G_level[1][i] | (P_level[1][i] & G_level[1][i-2]);
+            assign P_level[2][i] = P_level[1][i] & P_level[1][i-2];
+        end
+    endgenerate
+
+    // Nivel 3: Span 4 (combina cada 4 bits)
+    wire [7:0] G_final, P_final;
+    assign G_final[0] = G_level[2][0];
+    assign P_final[0] = P_level[2][0];
+    assign G_final[1] = G_level[2][1];
+    assign P_final[1] = P_level[2][1];
+    assign G_final[2] = G_level[2][2];
+    assign P_final[2] = P_level[2][2];
+    assign G_final[3] = G_level[2][3];
+    assign P_final[3] = P_level[2][3];
+    generate
+        for (i = 4; i < 8; i = i + 1) begin : level3
+            assign G_final[i] = G_level[2][i] | (P_level[2][i] & G_level[2][i-4]);
+            assign P_final[i] = P_level[2][i] & P_level[2][i-4];
+        end
+    endgenerate
+
+    // --- Cálculo de los carries ---
+    wire [8:0] C;
+    assign C[0] = 0;  // Carry inicial
+    assign C[1] = G_level[0][0];
+    assign C[2] = G_level[1][1];
+    assign C[3] = G_level[1][2] | (P_level[1][2] & C[1]);
+    assign C[4] = G_level[2][3];
+    assign C[5] = G_level[2][4] | (P_level[2][4] & C[1]);
+    assign C[6] = G_level[2][5] | (P_level[2][5] & C[2]);
+    assign C[7] = G_level[2][6] | (P_level[2][6] & C[3]);
+    assign C[8] = G_final[7] | (P_final[7] & C[3]);  // Cout
+
+    // --- Suma final ---
+    assign Sum = P ^ C[7:0];
+    assign Cout = C[8];
+endmodule

src/tt_um_alu_prefix.v

@@ -0,0 +1,28 @@
+module top_alu_fpga (
+    input [7:0] sw,          // Switches 0-7 for A[7:0]
+    input [7:0] swb,         // Switches 8-15 for B[7:0] (assuming continuous numbering)
+    input btnC, btnU, btnD,  // Operation selection buttons
+    output [7:0] led,        // LEDs 0-7 for result[7:0]
+    output led_zero          // Additional LED for Zero flag
+);
+    // Note: Removed 10-bit extension since we're working with 8-bit ALU
+
+    // Operation selection with buttons (3-bit encoding)
+    wire [2:0] ALU_Sel = {btnC, btnU, btnD};
+
+    // ALU connection
+    wire [7:0] ALU_Result;  // 8-bit result
+    wire Zero;              // Zero flag
+
+    ALU alu_inst (
+        .A(sw),      // Directly use switches 0-7 for A
+        .B(swb),     // Directly use switches 8-15 for B
+        .ALU_Sel(ALU_Sel),
+        .ALU_Out(ALU_Result),
+        .Zero(Zero)
+    );
+
+    // Output assignments
+    assign led = ALU_Result;  // Show full 8-bit result on LEDs
+    assign led_zero = Zero;   // Zero flag indicator
+endmodule