AI Generated DPL PR v2

[AmurG]

This is a slightly different version of : #8873

It serves exactly the same purpose : to reduce DRWL under high core utilization.

The differences between this and v1 in terms of QoR on our end have been too close to call.

We are submitting this as an alternative, as we believe there are confidential instances which can determine which is better.

As with v1, please only test circuits at or near the highest core utilization at which they will complete the flow.

Please also use a reasonable variation (2-4 choices each) of hyperparameters.

--AI Generated content follows--

Description

This PR introduces a new Two-Pass Power-Aware Detailed Placement Optimization flow to the detailed placer (DPL). This enhancement aims to reduce routed wirelength and power consumption by iteratively refining cell placement based on a hybrid cost function that balances HPWL and power density.

Motivation:

Standard detailed placement primarily focuses on legalization and wirelength minimization. By incorporating power density awareness and a multi-pass budget-constrained approach, this PR allows the placer to make more informed swaps that can reduce routing congestion and power hotspots without significantly degrading timing.

Key Features and Changes:

1. Two-Pass Optimization Flow (DetailedGlobalSwap::run):

   • New Logic: Implements a two-phase optimization.
     • Pass 1 (HPWL Profiling): Runs a global swap with a relaxed HPWL limit to establish an "optimal" HPWL baseline. This pass's moves are undone to restore the initial state for the next pass.
     • Pass 2 (Power Optimization): Iteratively refines placement over multiple stages (4 iterations with varying displacement limits) using a combined objective of wirelength and local power density. This pass operates within an HPWL budget derived from Pass 1.
   • Files Changed:
     • src/dpl/src/optimization/detailed_global.h: Added private member variables (budget_hpwl_, is_profiling_pass_, tradeoff_, power_contribution_, power_weight_) and new private methods (generateWirelengthOptimalMove, generateRandomMove, calculateAdaptivePowerWeight).
     • src/dpl/src/optimization/detailed_global.cxx: Rewrote the run and globalSwap methods to implement the two-pass flow. Added new helper functions (generateWirelengthOptimalMove, generateRandomMove, calculateAdaptivePowerWeight).

2. Power Density Awareness (Grid):

   • New Logic: The Grid class now tracks and computes power density across its pixels, enabling the placer to identify and mitigate power hotspots.
   • Files Changed:
     • src/dpl/src/infrastructure/Grid.h: Added public methods computePowerDensityMap, updatePowerDensity, getPowerDensity, and a private helper normalizeAndUpdatePowerDensity. Added new member variables: power_density_, total_area_, total_pins_, area_weight_, pin_weight_.
     • src/dpl/src/infrastructure/Grid.cpp: Implemented the new power density computation and update logic. Also added missing #include "network.h" for Network class usage.

3. Enhanced Padding Handling (Pixel struct):

   • New Logic: The Pixel struct's padding_reserved_by member was updated from a single Node* pointer to an std::unordered_set<Node*>. This allows multiple cells to reserve padding on the same pixel, supporting more complex spacing rules.
   • Files Changed:
     • src/dpl/src/infrastructure/Grid.h: Modified the Pixel struct.
     • src/dpl/src/infrastructure/Grid.cpp: Updated erasePixel and paintCellPadding methods to correctly interact with the std::unordered_set.
     • src/dpl/src/Opendp.cpp: Modified setFixedGridCells to use insert() for padding_reserved_by.
     • src/dpl/src/PlacementDRC.cpp: Modified checkPadding to iterate over the padding_reserved_by set for conflict detection.

4. Journaling Improvements (Journal):

   • New Logic: The Journal class was updated to provide mutable access and support range-based for loops, which are critical for the undo/redo mechanisms used in the multi-pass optimization.
   • Files Changed:
     • src/dpl/src/util/journal.h: Added begin() and end() methods.
     • src/dpl/src/optimization/detailed_manager.h: Updated getJournal() to return a non-const reference.

How to Enable/Disable and Hyperparameters:

The power-aware detailed placement optimization is controlled by the ENABLE_DPO environment variable or configuration setting.

• Enabling/Disabling:

  • The feature is enabled by default through ENABLE_DPO = 1 in flow/scripts/variables.yaml, which is read by the flow scripts.
  • To disable the feature, you can set ENABLE_DPO = 0 in your config.mk for a specific design or export export ENABLE_DPO=0 in your shell environment before running the flow.

• Exposed Hyperparameters (via improve_placement command arguments):

  • -p <passes>: Sets the number of optimization passes (default: 1).
  • -t <tolerance>: Sets the tolerance for HPWL improvement to stop early (default: 0.01).
  • -x <tradeoff_value>: Controls the trade-off between wirelength-optimal moves and random exploration for power optimization. Value ranges from 0.0 (pure wirelength) to 1.0 (full exploration for power) (default: 0.2).
  • DPO_MAX_DISPLACEMENT <disp_x> <disp_y>: Specifies the maximum allowed displacement for instances during optimization. This can be set in a config.mk file (e.g., export DPO_MAX_DISPLACEMENT = "100 20"). If unset, adaptive displacement limits are used by the flow (chip dimensions in early iterations, then scaled versions of the original displacement limits).

• Internal Hyperparameters (not directly exposed via Tcl commands):

  • num_samples (150): Number of random swaps sampled internally for adaptive power weight calculation.
  • user_knob (35.0): Tuning parameter within adaptive weight calculation to prioritize power over HPWL.