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Table 1. Instruction Set Syntax Terminology
Parameter | Meaning | Examples |
---|---|---|
REG, REG1, REG2, ... | Any register field from 8 to 32 bits | r0, r1.w0, r3.b2 |
Rn, Rn1, Rn2, ... | Any 32 bit register field (r0 through r31) | r0, r1 |
Rn.tx | Any 1 bit register field (x denotes the bit position) | r0.t23, r1.b2.t5 |
Rn.bx | Specifies a byte field that must be b0, b1, b2, or b3 – denoting r0.b0, r0.b1, r0.b2, and r0.b3, respectively. | b0, b1, b2, b3 |
Rn.wx | Specifies a two-byte (word) field that must be w0, w1, or w2 - denoting r0.w0, r0.w1, and r0.w2, respectively. w0 spans bytes 0 and 1; w1 spans bytes 1 and 2; w2 spans bytes 2 and 3. | w0, w1, w2 |
Cn, Cn1, Cn2, .. | Any 32 bit constant table entry (c0 through c31) | C0, C28 |
LABEL | Any valid label, specified with or without parenthesis. An immediate value denoting an instruction address is also acceptable. | loop1, (loop1), 0x0000 |
IM(n) | An immediate value from 0 to n. In clpru immediate values should be specified without a leading hash "#". Immediate values, labels, and register addresses are all acceptable. | #23, 0b0110, 0xF2, 2+2, &r3.w2 |
OP(n) | The union of REG and IM(n) | r0, r1.w0, #0x7F, 1<<3, loop1, &r1.w0 |
For example, the following is the definition for the ADD instruction:
ADD REG1, REG2, OP(255)
This means that the first and second parameters can be any register field from 8 to 32 bits. The third parameter can be any register field from 8 to 32 bits, or an immediate value from 0 to 255. Thus, the following are all legal ADD instructions:
ADD R1, R1, #0x25 // r1 += 37
ADD r1, r1, 0x25 // r1 += 37
ADD r3, r1, r2 // r3 = r1 + r2
ADD r1.b0, r1.b0, 0b100 // r1.b0 += 4
ADD r2, r1.w0, 1<<3 // r2 = r1.w0 + 8
All operations are 32 bits wide (with a 33-bit result in the case of arithmetic). The source values are zero extended prior to the operation. If the destination is too small to accept the result, the result is truncated. On arithmetic operations, the first bit to the left of the destination width becomes the carry value. Thus, if the destination register is an 8-bit field, bit 8 of the result becomes the carry. For 16- and 32-bit destinations, bit 16 and bit 32 are used as the carry bit, respectively.