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pre-commit.yml
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feat: add more CUDA syncs pre-commit #87: Commit da7b272 pushed by davschneller
15s dev2
dev2
15s
remove hardcoded vul pre-commit #86: Commit 2d5b00d pushed by vikaskurapati
1m 41s vikas/vista
vikas/vista
1m 41s
Modification in symbol.py pre-commit #85: Commit 6af3b2f pushed by vikaskurapati
5m 17s vikas/vista
vikas/vista
5m 17s
Modification in CUDA warp intrinsics and reduction pre-commit #84: Commit 071feb4 pushed by vikaskurapati
3m 3s vikas/vista
vikas/vista
3m 3s
fix: re-enable flag guard pre-commit #83: Commit d80b5f4 pushed by davschneller
1h 43m 43s dev2
dev2
1h 43m 43s
fix more builds (again) pre-commit #82: Commit 43de4b0 pushed by davschneller
1h 56m 45s dev2
dev2
1h 56m 45s
Fix sparse register matmuls pre-commit #81: Commit 059ecf4 pushed by davschneller
21s dev2
dev2
21s
Improve AMD atomic handling pre-commit #80: Commit bae2fb6 pushed by davschneller
17s dev2
dev2
17s
fix some register copies pre-commit #79: Commit 8ba4813 pushed by davschneller
2h 2m 1s dev2
dev2
2h 2m 1s
add shmem preload; prepare further pre-commit #78: Commit 25df436 pushed by davschneller
58s dev2
dev2
58s
fix: disable CLC for now pre-commit #77: Commit cbff3ce pushed by davschneller
33s dev2
dev2
33s
Work towards more asynchronous memory transfers pre-commit #76: Commit 4529582 pushed by davschneller
1m 28s dev2
dev2
1m 28s
Mix MFMA and DPP better pre-commit #75: Commit f1838b6 pushed by davschneller
17s dev2
dev2
17s
Improve DPP usage pre-commit #74: Commit da167bc pushed by davschneller
17s dev2
dev2
17s
Fix asserts pre-commit #73: Commit e948ed1 pushed by davschneller
19s dev2
dev2
19s
Disable experiments pre-commit #72: Commit b44a587 pushed by davschneller
20s dev2
dev2
20s
Try FP16 emulation pre-commit #71: Commit 524146e pushed by davschneller
18s dev2
dev2
18s
Add BF16->FP32 emulation pre-commit #70: Commit 33e94c1 pushed by davschneller
22s dev2
dev2
22s
Fix multilinear (and visco) pre-commit #69: Commit 9284e55 pushed by davschneller
24s dev2
dev2
24s
Add atomic updates pre-commit #68: Commit 40ac1b5 pushed by davschneller
41m 32s dev2
dev2
41m 32s
Continue work on buffering pre-commit #67: Commit 296a812 pushed by davschneller
3h 15m 29s dev2
dev2
3h 15m 29s
Implment double buffering pre-commit #66: Commit 4e5bcb8 pushed by davschneller
15s dev2
dev2
15s
nontemporal vector loads pre-commit #65: Commit 6c2ed1b pushed by davschneller
19s dev2
dev2
19s
Start implementing float4 loads pre-commit #64: Commit 3074009 pushed by davschneller
19s dev2
dev2
19s
Fix register names pre-commit #63: Commit 2101864 pushed by davschneller
29s dev2
dev2
29s