Add XIAO STM32C5 MicroPython board support - #22
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Board definition: - Zephyr board files (DTS, Kconfig, defconfig, yaml, cmake) - XIAO connector pin mapping (D0-D15 GPIO map) - UF2 bootloader partition layout (32KB boot, 488KB app) MicroPython integration: - Board config (.conf) and device tree overlay - Frozen module manifest (xiao.py, xiao_stm32c5.py, test scripts) - Python board pin/peripheral mapping (xiao_stm32c5.py) - Hardware abstraction layer (xiao.py): STM32C5 branch Custom C modules: - modcan: CAN/FDCAN driver with loopback, FD mode, up to 128 frame RX queue - Proper DLC encoding/decoding for CAN FD - Non-blocking recv(0) support Zephyr driver patches (zephyr/patches/zephyr-4.4.0/): - 0001-udc-stm32-hal2-support.patch: HAL2 USB device controller backport - 0002-flash-stm32-xspi-hal2-support.patch: HAL2 XSPI NOR flash driver - 0003-flash-stm32-xspi-hal2-support.patch: HAL2 XSPI header - 0004-adc-stm32-fix-pcsel-preselection.patch: PCSEL channel preselection fix Build tools: - xiao_stm32c5_build.sh: reproducible build with Zephyr 4.4.0 (applies .patch files via 'patch' command, restores on exit) - uf2conv.py: .bin to .uf2 converter (base 0x08008000, family 0x00C5C5C5) Test scripts: - xiao_stm32c5_full_test.py: interactive REPL test suite (ADC multi-sample, cross-talk, GPIO, I2C, IMU, PWM, CAN, Battery) - can_interconnect.py: two-board CAN FD interconnect test - can_debug.py: CAN device lookup diagnostic CI: GitHub Actions workflow for XIAO STM32C5 firmware build Co-Authored-By: Claude <noreply@anthropic.com>
Board / storage:
- xiao_stm32c5.dts: enlarge application partition, fix storage layout
- xiao_stm32c5.conf / .overlay: heap and I2C clock adjustments
- xiao_stm32c5_manifest.py: freeze production helper modules
Release tooling:
- release/xiao_stm32c5/{README,RELEASE_NOTES}.md
- tools/xiao_stm32c5/{build,flash,package}.sh (renamed from flat scripts)
- zephyr-4.4.0 patch refresh + README
Docs:
- README: STM32C5 build/venv and test-section updates
Co-Authored-By: Claude <noreply@anthropic.com>
CAN module (modcan.c): - Replace global rx_msgq with per-instance queue and frame buffer - Add we_started flag: deinit only stops controller if we started it - Handle -EBUSY from can_set_bitrate (controller already running) - Validate CAN FD payload lengths (reject non-DLC-aligned sizes) - Queue depth: 128 frames (9.1 KB per object) Test suite (xiao_stm32c5_full_test.py): - Expand to 21 tests across 9 phases (GPIO, ADC, I2C, IMU, PWM, CAN, Power, UART, Storage, RTC) - Add multi-instance, deinit isolation, invalid payload, variable speed CAN tests - Add gc.collect() before multi-instance tests to defragment heap - Remove i2c1_header and fdcan_external from test_all() (slow/require manual setup) - IMU ODR: 1.6Hz → 104Hz, add config delay can_interconnect.py: - Fix test_variable_speed early return bug (return outside loop) xiao.py: - XiaoCAN error: show real error instead of generic 'Invalid can' Board config: - xiao_stm32c5.overlay: I2C2 clock 100kHz → 400kHz - xiao_stm32c5.conf: heap 96KB → 105KB (support dual CAN objects)
modcan.c: - Replace we_started flag with shared device-state + refcount: a CAN controller is owned by a shared slot; multiple can_obj_t may bind to it and can_stop runs only when refcount reaches 0 (fixes deinit/GC of one object taking down a controller still used by another). - First owner applies config + starts; later owners validate fd / bitrate / loopback / data-bitrate match and reject on mismatch without touching the running controller or refcount. - RX queue 128 -> 32 frames (9.3KB -> 2.4KB per object) to fit the fragmented 105KB heap; CAN_MAX_DEVICES=4 defensive cap. - Per-object dual RX filters (std + ext) so extended frames reach the msgq. - send(): validate id range and set CAN_FRAME_IDE for 29-bit ids. - Idempotent deinit (safe under double-deinit / GC after explicit deinit). Tests: - xiao_stm32c5_full_test.py: refactor to single combined entry point (base peripherals + 9 FDCAN tests); add owner / mismatch / id CAN tests. - xiao_stm32c5_base_test.py (new): granular base-peripheral suite. - xiao_stm32c5_can_test.py (new): 9 FDCAN loopback tests (PR#22 fixes). - can_interconnect.py: two-board interconnect refinements. Docs: - README + release notes: full_test is the single entry point; manifest comment notes base/can/interconnect scripts are not frozen. Co-Authored-By: Claude <noreply@anthropic.com>
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Summary
Add complete MicroPython board support for Seeed XIAO STM32C5.
Changes
xiao_stm32c5.py)recv(0)supportxiao_stm32c5_build.sh), UF2 converter (uf2conv.py)Files changed
31 files changed, +4,068 / -124 lines