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[Pass] BuffeLoad & BufferStore with Predicates#143

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JiaqiGuoSunlune wants to merge 5 commits intotilelang_mesh_mainfrom
u/jiaqiguo/sunmmio-rsram-load-slice
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[Pass] BuffeLoad & BufferStore with Predicates#143
JiaqiGuoSunlune wants to merge 5 commits intotilelang_mesh_mainfrom
u/jiaqiguo/sunmmio-rsram-load-slice

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@JiaqiGuoSunlune
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  1. Allow to select tileview that has unaligned load for rank-1 buffer
  2. Infer predicates for buffer load & buffer store based on the logical extent and physical tile view

@JiaqiGuoSunlune
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@codex review

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Codex Review: Didn't find any major issues. What shall we delve into next?

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@JiaqiGuoSunlune JiaqiGuoSunlune requested review from weizzh May 9, 2026 06:45
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[Feature Request] Support unaligned buffer load in mixed-rank operations [Feature Request] - T.Tiles support predicate (mask) at the tail tiles

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