Skip to content

[Test] Tests for the compilation pipeline.#104

Open
xiaoyao-NKU wants to merge 3 commits intoSUNMMIO:tilelang_mesh_mainfrom
xiaoyao-NKU:compile_test
Open

[Test] Tests for the compilation pipeline.#104
xiaoyao-NKU wants to merge 3 commits intoSUNMMIO:tilelang_mesh_mainfrom
xiaoyao-NKU:compile_test

Conversation

@xiaoyao-NKU
Copy link
Copy Markdown
Collaborator

PR Description: [Test] Compilation Pipeline Testing Framework and Sunmmio Operator Verification

This PR introduces a compilation pipeline testing framework for the sunmmio-a4e hardware target and adds a series of end-to-end compilation tests for core operators and communication primitives.

Summary

Established a test_config-driven compilation pipeline verification mechanism. By comparing IR strings generated at different compilation stages (e.g., LowerTileOp, InjectSunmmioSync, MergeSharedMemoryAllocationsSunmmio, DeviceMode), the correctness of compilation transformations is ensured.

Key Changes

  • Test Framework Enhancements:
    • Added compile_pipeline.py: Defines a unified compile_test interface supporting multi-stage IR validation.
    • Added formal_verify_funcs.py: Provides formal verification utility functions for validating critical metadata such as memory allocation sizes.
  • Synchronization and Barrier Verification:
    • Validated the InjectSunmmioSync pass in test_sync.py.
    • Ensured automatic insertion of synchronization primitives such as T.sync_token_id, T.barrier_init, and T.barrier_arrive_and_wait.
  • Communication Primitives Verification:
    • Covered compilation transformations of T.comm.broadcast, T.comm.put, and T.comm.all_gather under Mesh topology in test_comm.py.
  • End-to-End Tests for Complex Operators:
    • Added test cases for FlashAttention (test_flashattn.py), SUMMA (test_summa.py), and multi-level MMA (test_mma_3times.py).

Technical Impact

  • Memory Management Optimization: Verified that MergeSharedMemoryAllocationsSunmmio correctly merges memory allocations across different scopes (asram, wsram, rsram), effectively improving on-chip storage utilization.
  • Pipeline Stability: Prevents regression errors in subsequent compiler optimization passes through fine-grained IR expectation matching.
  • Hardware Feature Coverage: Improved automated test coverage for DMA copy synchronization and multi-core interaction logic in the sunmmio-a4e architecture.

Verification

  • Ran all new test scripts: python3 testing/python/compile_pipeline/test_*.py.
  • All test cases passed IR expectation matching and formal verification of memory sizes.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants