[https://nvbugs/5567586][feat] Ampere xqa swa specdec for GPT-OSS Eagle3-one-model #8383
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📝 WalkthroughWalkthroughThe patch updates cuda kernels and tests. It modifies applyMaskFromInput in cpp/kernels/xqa/mha.cu to add sliding-window-aware masking with conditional parameters and logic. Test utilities change warmup’s signature to accept clockRate, retrieve it via CUDA APIs, update prefetch calls, and propagate the new parameter across call sites. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
participant K as kernel_mha_impl
participant M as applyMaskFromInput
participant ACC as Accumulator
K->>M: applyMaskFromInput(warp, acc, mask, rowOffset, ..., headGrpSize[, tok0WinBeg, seqIter, cacheSeqLen, warpTileTokenBeg])
rect rgb(240,248,255)
note over M: Determine masking path
M-->>M: Compute needMask (incl. sliding-window)
alt needMask == false
M-->>K: Return (no mask)
else needMask == true
M-->>M: Clamp tokenRow to actualQSeqLen
opt SLIDING_WINDOW && !IS_SPEC_DEC_TREE
M-->>M: Compute begMask per CTA
end
M-->>M: Load/assemble packed mask bits (conditional)
M-->>ACC: Apply mask to accumulator tiles
M-->>K: Return (masked)
end
end
K-->>ACC: Continue with subsequent compute
sequenceDiagram
autonumber
participant T as test.cpp
participant CUDA as CUDA Runtime
participant W as warmup
T->>CUDA: cudaDeviceGetAttribute(memoryClockRate)
CUDA-->>T: clockRate
T->>W: warmup(prop, clockRate, ms, stream?)
W-->>W: nbCycles = f(clockRate, ms)
T->>CUDA: cudaMemPrefetchAsync(..., cudaMemLocation{device/host}, flags=0)
Estimated code review effort🎯 4 (Complex) | ⏱️ ~55 minutes Pre-merge checks and finishing touches❌ Failed checks (2 warnings)
✅ Passed checks (1 passed)
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Actionable comments posted: 2
🧹 Nitpick comments (4)
cpp/kernels/xqa/test/warmup.cu (1)
13-13: Pass int by value instead of const reference.For primitive types like
int, pass by value is more efficient than pass by const reference. The const reference adds an extra indirection that hurts performance for small types.Apply this diff:
-void warmup(cudaDeviceProp const& prop, int const& clockRate, float ms, cudaStream_t stream = nullptr) +void warmup(cudaDeviceProp const& prop, int clockRate, float ms, cudaStream_t stream = nullptr)cpp/kernels/xqa/test/test.cpp (1)
42-42: Update function declaration to pass int by value.For consistency with the recommendation on warmup.cu, update the declaration to pass
clockRateby value instead of by const reference.Apply this diff:
-void warmup(cudaDeviceProp const& prop, int const& clockRate, float ms, cudaStream_t stream = nullptr); +void warmup(cudaDeviceProp const& prop, int clockRate, float ms, cudaStream_t stream = nullptr);cpp/kernels/xqa/mha.cu (2)
1512-1516: Remove or properly guard commented debug code.The commented
printfstatements add clutter. Either remove them if no longer needed, or guard them with a debug macro that can be enabled during development.Apply this diff to remove the commented code:
- // if (threadIdx.x % 32 == 0){ - // printf("[mha.cu] kernel_mha_impl gridDim.x %d, gridDim.y %d, gridDim.z %d, blockIdx.x %d, blockIdx.y %d, blockIdx.z %d, threadIdx.x %d, threadIdx.y %d, threadIdx.z %d, warpTile.y %d, variableQSeqLen %d, \ - // actualQSeqLen %d reqSeqOffset %d nbVHeads %d nbQHeads %d nbQHeadTokens %d nbQKVHeads %d nbTokenBlocksPerGrp %d idxHeadGrp %d idxHeadTokenInGrp %d nbValidHeadTokens %d\n", - // gridDim.x, gridDim.y, gridDim.z, blockIdx.x, blockIdx.y, blockIdx.z, threadIdx.x, threadIdx.y, threadIdx.z, warpTile.y, variableQSeqLen, actualQSeqLen, reqSeqOffset, nbVHeads, nbQHeads, nbQHeadTokens, nbQKVHeads, nbTokenBlocksPerGrp, idxHeadGrp, idxHeadTokenInGrp, nbValidHeadTokens); - // }Or guard with a debug macro:
+#if defined(XQA_DEBUG_VERBOSE) + if (threadIdx.x % 32 == 0){ + printf("[mha.cu] kernel_mha_impl gridDim.x %d, gridDim.y %d...\n", ...); + } +#endif
2822-2822: Remove commented debug printf.Similar to lines 1512-1516, this commented debug statement should be removed or properly guarded.
Apply this diff:
- // printf("[mha.cu] nbSubSeqPerSeq %d, nbKHeads * nbTokenBlocksPerGrp %d, batchSize %d\n", nbSubSeqPerSeq, nbKHeads * nbTokenBlocksPerGrp, batchSize);
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cpp/kernels/xqa/mha.cu(8 hunks)cpp/kernels/xqa/test/test.cpp(6 hunks)cpp/kernels/xqa/test/warmup.cu(1 hunks)
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🧬 Code graph analysis (2)
cpp/kernels/xqa/mha.cu (1)
cpp/kernels/xqa/utils.h (1)
divUp(74-77)
cpp/kernels/xqa/test/test.cpp (2)
cpp/kernels/xqa/utils.h (1)
checkCuda(32-39)cpp/kernels/xqa/test/warmup.cu (2)
warmup(13-18)warmup(13-13)
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🔇 Additional comments (4)
cpp/kernels/xqa/test/test.cpp (1)
82-93: LGTM - cudaMemPrefetchAsync API usage updated correctly.The change from direct
dstDeviceparameter tocudaMemLocationstructure aligns with updated CUDA API requirements. The logic correctly handles device vs host locations and sets the flag to zero as required.cpp/kernels/xqa/mha.cu (2)
463-497: Verify sliding window masking logic for correctness.The extended signature adds sliding-window parameters conditionally. The early return when
!needMaskis a good optimization, but ensure the conditions forctaNeedBegMaskandctaNeedSpecDecMaskare mutually exclusive or correctly combined.Key points to verify:
- Lines 478-480: Does
overlap(tileRange, maxMaskOutRange)correctly identify when beginning mask is needed?- Lines 482-483: Is the calculation of
nbSeqItersWithoutSpecDecMaskcorrect for all edge cases?- Line 490: The interaction between
ctaNeedBegMaskandctaNeedSpecDecMask- are these cases properly handled?Consider adding assertions for the sliding window invariants in debug builds.
1656-1683: Verify sliding window calculations for off-by-one errors.The sliding window setup calculates
tok0WinBeg,nbTotalSkipTokens, and related values. These calculations involve subtractions and comparisons that are prone to off-by-one errors.Key calculations to verify:
- Line 1657:
tok0SeqLen = cacheSeqLen - actualQSeqLen + 1 + idxHeadTokenInGrp- verify the +1 is correct- Line 1658:
tok0WinBeg = int32_t(tok0SeqLen) - int32_t(slidingWinSize)- ensure this correctly identifies the window start- Line 1659:
nbTotalSkipTokens = mha::max(0, tok0WinBeg)- verify this correctly handles negative valuesConsider adding assertions in debug builds:
#ifndef NDEBUG assert(tok0SeqLen <= cacheSeqLen); assert(nbTotalSkipTokens <= cacheSeqLen); assert(slidingWinSize > 0); #endifcpp/kernels/xqa/test/warmup.cu (1)
15-15: Remove overflow warning—units and calculation are correct.
clockRate is returned in kHz by cudaDevAttrMemoryClockRate, and kHz × ms (ms in milliseconds) directly yields cycles; a uint64_t safely holds the result.Likely an incorrect or invalid review comment.
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Please make sure you locally tested special cases like multi-block mode.
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Thanks @lowsfer, for Ampere XQA, the multi-block mode is not enabled yet in TRTLLM. |
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Really an un-related error. |
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Signed-off-by: Jhao-Ting Chen <[email protected]>
Signed-off-by: Jhao-Ting Chen <[email protected]>
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Summary by CodeRabbit
New Features
Performance
Tests
Before this PR
GPT-OSS Eagle3-one-model TP=2
After this PR
GPT-OSS Eagle3-one-model TP=2
Description
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