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Welcome!
Please learn about me more on my homepage https://jackcuii.github.io/!
This is a lite generator of the constraint file for the Xilinx Vivado (namely .xdc).
Python 4
My new blog website, still under construction (for a long time...).
Astro 1
CGRA framework with vectorization support.
Python 39 25
MLIR 19 13
Zeonica is a simulator for CGRA and Wafer-Scale Accelerators.
Go 11 2
main repo of AwfulOwl
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