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FlatRecon: Flat Placement Reconstruction Full Legalizer

docsDocumentationDocumentation

lang-cppC/C++ codeC/C++ code

lang-pythonPython codePython code

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 3193

#3193 In verilog-to-routing/vtr-verilog-to-routing;

· haydar-c opened on Jul 8, 2025

· Changes requested

· 28/28

61

[WIP] Router Lookahead Profiler

buildBuild systemBuild system

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-makeCMake/Make codeCMake/Make code

lang-pythonPython codePython code

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Draft (not ready).

verilog-to-routing/vtr-verilog-to-routingnumber 2683

#2683 In verilog-to-routing/vtr-verilog-to-routing;

· nedsels opened on Aug 12, 2024

· Changes requested

· 34/51

79

fixed sdc file copy and parmys abs path to temp folder issue

lang-pythonPython codePython code

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2427

#2427 In verilog-to-routing/vtr-verilog-to-routing;

· WhiteNinjaZ opened on Nov 2, 2023

· 44/51

14

generate_tech_xml_files.sh

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2426

#2426 In verilog-to-routing/vtr-verilog-to-routing;

· zsjiang99 opened on Nov 2, 2023

5

[WIP] Tileable Routing Resource Graph Builder

buildBuild systemBuild system

docsDocumentationDocumentation

external_libs

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-hdlHardware Description Language (Verilog/VHDL)Hardware Description Language (Verilog/VHDL)

lang-makeCMake/Make codeCMake/Make code

lang-netlist

lang-pythonPython codePython code

lang-shellShell scripts (bash etc.)Shell scripts (bash etc.)

libarchfpgaLibrary for handling FPGA Architecture descriptionsLibrary for handling FPGA Architecture descriptions

liblog

libpugiutil

libvtrutil

OdinOdin II Logic Synthesis Tool: Unsorted itemOdin II Logic Synthesis Tool: Unsorted item

Parmys

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 2135

#2135 In verilog-to-routing/vtr-verilog-to-routing;

· tangxifan opened on Aug 16, 2022

· 1/2

Converter from rr_nodes to RRGraph object

docsDocumentationDocumentation

infraProject InfrastructureProject Infrastructure

lang-cppC/C++ codeC/C++ code

lang-pythonPython codePython code

libvtrutil

scriptsUtility & Infrastructure scriptsUtility & Infrastructure scripts

tests

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

VTR FlowVTR Design Flow (scripts/benchmarks/architectures)VTR Design Flow (scripts/benchmarks/architectures)

Status: Open (in progress).

verilog-to-routing/vtr-verilog-to-routingnumber 1048

#1048 In verilog-to-routing/vtr-verilog-to-routing;

· tangxifan opened on Nov 15, 2019

39