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| 1 | +--- |
| 2 | +title: "GSoC '25 Week 5 Update by Safwan Sayeed" |
| 3 | +excerpt: "Implementing the Symbol Table and Memory Module Integration" |
| 4 | +category: "DEVELOPER NEWS" |
| 5 | +date: "2025-07-06" |
| 6 | +slug: "2025-07-06-gsoc-25-sa-fw-an-week5" |
| 7 | +author: "@/constants/MarkdownFiles/authors/safwan-sayeed.md" |
| 8 | +tags: "gsoc25,sugarlabs,week5,sa-fw-an" |
| 9 | +image: "assets/Images/GSOC.png" |
| 10 | +--- |
| 11 | + |
| 12 | +<!-- markdownlint-disable --> |
| 13 | + |
| 14 | +# Week 5 Progress Report by Safwan Sayeed |
| 15 | + |
| 16 | +**Project:** Music Blocks 4 Program Engine |
| 17 | +**Mentors:** [Anindya Kundu](https://github.com/meganindya/), [Sumit Srivastava](https://github.com/sum2it) |
| 18 | +**Assisting Mentors:** [Devin Ullibari](https://github.com/pikurasa/), [Walter Bender](https://github.com/walterbender) |
| 19 | +**Reporting Period:** 2025-06-30 - 2025-07-06 |
| 20 | + |
| 21 | +--- |
| 22 | + |
| 23 | +## A Blog-style Retrospective |
| 24 | + |
| 25 | +This week I implemented the Symbol Table and integrated it with the Memory Module to manage variable scopes and dependencies effectively. This was a crucial step in preparing for the Abstract Syntax Tree (AST)-to-Intermediate Representation (IR) compilation logic, ensuring that our program engine can handle variable resolution correctly during the translation process. |
| 26 | + |
| 27 | +--- |
| 28 | + |
| 29 | +## Goals for This Week |
| 30 | + |
| 31 | +- Design the Symbol Table. |
| 32 | +- Implement the Symbol Table in the Memory Module. |
| 33 | +--- |
| 34 | + |
| 35 | +## This Week's Highlights |
| 36 | + |
| 37 | +1. **Symbol Table Design and Implementation** |
| 38 | + - Designed the Symbol Table to manage variable scopes and dependencies effectively. |
| 39 | + - Integrated the Symbol Table with the Memory Module to ensure proper variable resolution during AST-to-IR translation. |
| 40 | + - Documented the design and usage patterns for future reference. |
| 41 | + |
| 42 | +--- |
| 43 | + |
| 44 | +## Challenges & Solutions |
| 45 | + |
| 46 | +- **Managing Variable Scopes:** |
| 47 | + Initially faced challenges in ensuring that variable scopes were correctly maintained across different blocks of code. |
| 48 | + *Solution:* Implemented a robust Symbol Table that tracks variable declarations and their scopes, allowing for accurate resolution during the AST-to-IR translation. |
| 49 | + |
| 50 | + |
| 51 | +--- |
| 52 | + |
| 53 | +## Key Learnings |
| 54 | + |
| 55 | +- Gained a deeper understanding of how to manage variable scopes and dependencies in a compiler context. |
| 56 | +- Learned how to design and implement a Symbol Table that integrates with the Memory Module to facilitate variable resolution during the AST-to-IR translation process. |
| 57 | + |
| 58 | +--- |
| 59 | + |
| 60 | +## Next Week's Roadmap |
| 61 | + |
| 62 | +- Start working on the execution engine that will interpret the generated IR instructions. |
| 63 | +- Begin implementing the first set of IR instructions. |
| 64 | +--- |
| 65 | + |
| 66 | +## Resources & References |
| 67 | + |
| 68 | +- **Repository:** [musicblocks-v4](https://github.com/sugarlabs/musicblocks-v4) |
| 69 | + |
| 70 | +--- |
| 71 | + |
| 72 | +## Acknowledgments |
| 73 | + |
| 74 | +Special thanks to my mentors Anindya, Sumit, Devin, and Walter for their crucial guidance on compiler design principles and static compilation concepts. Their clarification on the AST-to-IR translation approach and emphasis on maintaining clean instruction generation patterns was essential for this week's successful progress. |
| 75 | + |
| 76 | +--- |
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