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Unwanted multiple blank removal in macro generated assembler statements #35

@Fish-Git

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@Fish-Git

How can I align my macro generated assembler statements exactly the way I code them in ASMA?

Here's a simple repro test case that illustrates the problem:

                MACRO
                NODOTS
SIE_V           DS   X            Intervention requests
SIE_V_WAIT      EQU  X'10'          Wait/Run bit
SIE_V_EXTCALL   EQU  X'08'          External call pending
SIE_V_STOP      EQU  X'04'          SIE Stop control
SIE_V_IO        EQU  X'02'          I/O Interrupt pending
SIE_V_EXT       EQU  X'01'          EXT Interrupt pending
                MEND
*
                MACRO
                DOTS
SIE_V.          DS   X            Intervention requests
SIE_V_WAIT.     EQU  X'10'          Wait/Run bit
SIE_V_EXTCALL.  EQU  X'08'          External call pending
SIE_V_STOP.     EQU  X'04'          SIE Stop control
SIE_V_IO.       EQU  X'02'          I/O Interrupt pending
SIE_V_EXT.      EQU  X'01'          EXT Interrupt pending
                MEND
                EJECT
                NODOTS
                EJECT
                DOTS
                END

Which produces:

ASMA Ver. 0.2.1                                                                                     30 Apr 2023 18:15:51  Page     2

  LOC        OBJECT CODE       ADDR1     ADDR2    STMT

                                                    21                 NODOTS
00000000  00                                        22+SIE_V    DS    X                  Intervention requests
                              00000010  00000001    23+SIE_V_WAIT EQU X'10'                Wait/Run bit
                              00000008  00000001    24+SIE_V_EXTCALL EQU X'08'             External call pending
                              00000004  00000001    25+SIE_V_STOP EQU X'04'                SIE Stop control
                              00000002  00000001    26+SIE_V_IO EQU   X'02'                I/O Interrupt pending
                              00000001  00000001    27+SIE_V_EXT EQU  X'01'                EXT Interrupt pending
ASMA Ver. 0.2.1                                                                                     30 Apr 2023 18:15:51  Page     3

  LOC        OBJECT CODE       ADDR1     ADDR2    STMT

                                                    29                 DOTS
00000001  00                                        30+SIE_V.   DS    X                  Intervention requests
                              00000010  00000001    31+SIE_V_WAIT. EQU X'10'               Wait/Run bit
                              00000008  00000001    32+SIE_V_EXTCALL. EQU X'08'            External call pending
                              00000004  00000001    33+SIE_V_STOP. EQU X'04'               SIE Stop control
                              00000002  00000001    34+SIE_V_IO. EQU  X'02'                I/O Interrupt pending
                              00000001  00000001    35+SIE_V_EXT. EQU X'01'                EXT Interrupt pending
                                                    36                 END

 
As you can see, it appears ASMA's macro handling is reducing multiple blanks down to a single blank when it generates (outputs) a non-macro assembler statement, which screws up my desired statement alignment.

Is there some magical ASMA option or syntax that I am unaware of that will do what I want to do? I checked the manual but could not find anything anywhere covering this topic/situation.

Thanks.

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