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Add the strict view update
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ArchSemArm/VMPromising.v

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -980,9 +980,9 @@ Definition read_pte (vaddr : view) :
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(** Run a RegRead outcome.
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Returns the register value and the view. *)
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Definition run_reg_read (reg : reg) (racc : reg_acc) :
983-
Exec.t TState.t string (reg_type reg) :=
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ts ← mGet;
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valv
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Exec.t (TState.t * IIS.t) string (reg_type reg) :=
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ts ← mget fst;
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'(val, view)
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(if decide (reg ∈ relaxed_regs) then
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if decide (is_Some racc)
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then Exec.error_none "Register unmapped on direct read"
@@ -993,7 +993,8 @@ Definition run_reg_read (reg : reg) (racc : reg_acc) :
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mchoosel valvs
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else
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Exec.error_none "Register unmapped; cannot read" $ TState.read_reg ts reg);
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mret (valv.1).
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mset snd $ IIS.add view;;
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mret val.
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(** Run a RegWrite outcome.
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Updates the thread state using a register value *)
@@ -1015,12 +1016,13 @@ Definition run_reg_write (reg : reg) (racc : reg_acc) (val : reg_type reg) :
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mret 0%nat
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else mret vreg);
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if decide (reg ∈ relaxed_regs) then
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valvi ← Exec.error_none "Register unmapped on direct read" $ TState.read_sreg_direct ts reg;
1019-
let vpre := ts.(TState.vcse) ⊔ ts.(TState.vspec) ⊔ ts.(TState.vdsb) ⊔ valvi.2 in
1019+
'(val, view) ← Exec.error_none "Register unmapped on direct read" $ TState.read_sreg_direct ts reg;
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let vpre := ts.(TState.vcse) ⊔ ts.(TState.vspec) ⊔ ts.(TState.vdsb) ⊔ view in
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let vpost := vreg' ⊔ vpre in
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let vmsr := ts.(TState.vmsr) ⊔ vpost in
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mset PPState.state $ TState.add_wsreg reg val vpost;;
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mset PPState.state $ TState.update TState.vmsr vmsr
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mset PPState.state $ TState.update TState.vmsr vmsr;;
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mset PPState.iis $ IIS.add vpost
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else
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nts ← Exec.error_none "Register unmapped; cannot write" $
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TState.set_reg ts reg (val, vreg');
@@ -1222,7 +1224,7 @@ Section RunOutcome.
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| RegWrite reg racc val =>
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run_reg_write reg racc val
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| RegRead reg racc =>
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Exec.liftSt PPState.state $ (run_reg_read reg racc)
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Exec.liftSt (PPState.state ×× PPState.iis) $ (run_reg_read reg racc)
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| MemRead 8 0 rr =>
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let initmem := Memory.initial_from_memMap initmem in
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val ← run_mem_read rr initmem;

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