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Description
Disclaimer
I realize that this issue isn't necessarily tied to this particular add-on;
I just didn't know where else to put it.
Describe the bug
When I run debugging via F5, the PIO input FIFOs are getting cleared
because of this or one of the subservient add-ons.
PIO
// ------------ //
// sm_bus_lower //
// ------------ //
#define sm_bus_lower_wrap_target 0
#define sm_bus_lower_wrap 9
#define sm_bus_lower_pio_version 1
static const uint16_t sm_bus_lower_program_instructions[] = {
// .wrap_target
0xa06b, // 0: mov pindirs, ~null side 0
0x80a0, // 1: pull block side 0
0x2096, // 2: wait 1 gpio, 22 side 0
0x6110, // 3: out pins, 16 side 0 [1]
0x6110, // 4: out pins, 16 side 0 [1]
0xb163, // 5: mov pindirs, null side 1 [1]
0x2092, // 6: wait 1 gpio, 18 side 0
0x4010, // 7: in pins, 16 side 0
0x4170, // 8: in null, 16 side 0 [1]
0x8120, // 9: push block side 0 [1]
// .wrap
};
#if !PICO_NO_HARDWARE
static const struct pio_program sm_bus_lower_program = {
.instructions = sm_bus_lower_program_instructions,
.length = 10,
.origin = -1,
.pio_version = sm_bus_lower_pio_version,
#if PICO_PIO_VERSION > 0
.used_gpio_ranges = 0x2
#endif
};
static inline pio_sm_config sm_bus_lower_program_get_default_config(uint offset) {
pio_sm_config c = pio_get_default_sm_config();
sm_config_set_wrap(&c, offset + sm_bus_lower_wrap_target, offset + sm_bus_lower_wrap);
sm_config_set_sideset(&c, 1, false, true);
return c;
}
#endif
Init code
static void pio_init(void)
{
uint sm[2], offset;
pio_sm_config config;
bool success;
success = pio_claim_free_sm_and_add_program_for_gpio_range(&sm_clk_pio_program, &pio, &sm[0], &offset, PIO_PIN_CLK, 1, false);
hard_assert(success);
config = sm_clk_pio_program_get_default_config(offset);
sm_config_set_set_pins(&config, PIO_PIN_CLK, 1);
pio_gpio_init(pio, PIO_PIN_CLK);
gpio_set_slew_rate(PIO_PIN_CLK, GPIO_SLEW_RATE_SLOW);
pio_sm_set_consecutive_pindirs(pio, sm[0], PIO_PIN_CLK, 1, true);
pio_sm_init(pio, sm[0], offset, &config);
pio_sm_set_clkdiv(pio, sm[0], PIO_PIN_CLKDIV);
success = pio_claim_free_sm_and_add_program_for_gpio_range(&sm_bus_lower_program, &pio, &sm[1], &offset, 2, 18, false);
hard_assert(success);
config = sm_bus_lower_program_get_default_config(offset);
sm_config_set_out_shift(&config, true, false, 32);
sm_config_set_out_pins(&config, PIO_PIN_BASE, 16);
sm_config_set_in_pin_base(&config, PIO_PIN_BASE);
sm_config_set_in_pin_count(&config, 16);
sm_config_set_in_shift(&config, true, false, 32);
sm_config_set_jmp_pin(&config, PIO_PIN_DTACKN);
sm_config_set_sideset_pins(&config, PIO_PIN_DTACKN);
for (size_t i = 2; i <= PIO_PIN_DTACKN; i++) {
pio_gpio_init(pio, i);
}
pio_sm_init(pio, sm[1], offset, &config);
pio_sm_set_clkdiv(pio, sm[1], PIO_PIN_CLKDIV);
pio_enable_sm_mask_in_sync(pio, 1u << sm[0] | 1u << sm[1]);
pio_sm_put_blocking(pio, sm[1], 0xDC0180FF);
uint32_t result = pio_sm_get_blocking(pio, sm[1]);
printf("0x%08lX\n", result);
}
To Reproduce
If you single-step through the init with F10, once you step past pio_sm_put_blocking(pio, sm[1], 0xDC0180FF); the pio_sm_get_blocking() call will hang forever because the response data is already "popped".
If I instead put a break point on the printf line and use F5, it all works as expected;
pio_sm_get_blocking() doesn't, but returns the correct data.
Expected behavior
The add-on in question should keep it's hands off the FIFO registers...
Platform (please complete the following information):
- OS: Linux Mint 22.3
- Architecture: x86
- Version: 0.19.0, SDK: 2.2.0
Additional context
As I stated at the top, this could very well be caused by one of the dependencies,
but for some reason, VS Code won't show me; the tab is blank.
Took me about a day, wrangling ChatGPT, before I realized the "don't break between put and get",
so if this goes nowhere, I at least hope that I can save someone else's sanity...