If you are using these IPs for an academic publication, please cite the following paper:
@article{conti2018xne,
author={F. {Conti} and P. D. {Schiavone} and L. {Benini}},
journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
title={XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference},
year={2018},
doi={10.1109/TCAD.2018.2857019},
ISSN={0278-0070},
}
See documentation on https://hwpe-doc.readthedocs.io.
This repository contains the IPs necessary to produce HWPE (HW Processing Engine) control registers, e.g. for the XNE, HWCE, etc.