verif: Remove decoupled LEVEL_BITS and MAX_FENCES and constraint

Author: sermazz

target/verif/config/generated/testbench.mk.tpl

@@ -11,4 +11,3 @@ RANDOM_GNT?=${RANDOM_GNT}
 INVERT_PRIO?=${INVERT_PRIO}
 PRIORITY_CNT_NUMERATOR?=${PRIORITY_CNT_NUMERATOR}
 PRIORITY_CNT_DENOMINATOR?=${PRIORITY_CNT_DENOMINATOR}
-LEVEL_BITS?=${LEVEL_BITS}

target/verif/config/testbench.json

@@ -6,7 +6,6 @@
     "RANDOM_GNT": 0,
     "INVERT_PRIO": 0,
     "PRIORITY_CNT_NUMERATOR": 10,
-    "PRIORITY_CNT_DENOMINATOR": 11,
-    "LEVEL_BITS": 5
+    "PRIORITY_CNT_DENOMINATOR": 11
   }
 }

target/verif/simvectors/README.md

@@ -219,8 +219,8 @@ Weighted random traffic across hot regions.
 
 4. Dependency gate for `wait_for_jobs`
 - For each dependent pattern, generator inserts a synthetic idle+`PAUSE` gate before real traffic.
-- Each gate crossing increments the driver's `fence_idx` counter. The required `fence_idx` values are packed into `LEVEL_BITS`-bit fields in `FENCE_REQ_LEVELS_PACKED`, so the maximum supported `fence_idx` value is `2^LEVEL_BITS - 1`.
-- `LEVEL_BITS` is configured in `testbench.json` (default: 4, i.e. max 15 fence crossings per driver). Increase it if generation fails with a fence level overflow error.
+- Each gate crossing increments the driver's `fence_idx` counter. The required `fence_idx` values are packed into `LEVEL_BITS`-bit fields in `FENCE_REQ_LEVELS_PACKED`.
+- `LEVEL_BITS` is auto-derived by main.py as the minimum bits to represent the maximum required `fence_idx` in the workload (`max_req_level.bit_length()`), and emitted to `fence_masks.mk`. Both the packed field width and the fence array depth (`2^LEVEL_BITS`) are derived from it, so they always match the workload with no manual configuration.
 
 5. `idle` pattern
 - Explicitly emits idle and `PAUSE`.

target/verif/simvectors/main.py

@@ -72,10 +72,6 @@ def main(argv=None):
     testbench_config = load_config(args.testbench_config, "Testbench configuration")
     workload_config = load_config(args.workload_config, "Workload configuration")
 
-    # Testbench parameters
-    tb_params = testbench_config['parameters']
-    LEVEL_BITS = int(tb_params.get('LEVEL_BITS', 4))
-
     # Hardware parameters
     hw_params = hardware_config['parameters']
     N_BANKS = hw_params['N_BANKS']
@@ -1105,15 +1101,9 @@ def _resolve_req_levels(wait_for_jobs_list):
         for f in range(max_fences):
             for j in range(N_DRIVERS):
                 max_req_level = max(max_req_level, int(req_levels[i][f][j]))
+    # Derive minimum LEVEL_BITS to represent max_req_level (at least 1 bit).
+    LEVEL_BITS = max(1, max_req_level.bit_length())
     max_level_val = (1 << LEVEL_BITS) - 1
-    if max_req_level > max_level_val:
-        print(
-            "ERROR: Fence dependency level overflow: "
-            f"required fence_idx={max_req_level}, but packed format supports only 0..{max_level_val} "
-            f"(LEVEL_BITS={LEVEL_BITS}). "
-            f"Reduce the number of fence crossings per dependent job or increase LEVEL_BITS in testbench.json."
-        )
-        sys.exit(1)
 
     packed_width = N_DRIVERS * LEVEL_BITS
     packed_hex_digits = (packed_width + 3) // 4
@@ -1138,6 +1128,9 @@ def _resolve_req_levels(wait_for_jobs_list):
             f"# fence f = PAUSE after pattern f; fence_idx[i]==k means i completed k patterns.\n"
             f"# FENCE_MASKS[i][f][j]=1: j is a dependency of i at fence f.\n"
             f"# FENCE_REQ_LEVELS_PACKED[i][f]: packed {packed_width}-bit vector, bits [j*LEVEL_BITS+LEVEL_BITS-1:j*LEVEL_BITS] = min fence_idx[j].\n"
+            f"# LEVEL_BITS: minimum bits to encode the max required fence_idx ({max_req_level}) for this workload.\n"
+            f"# Array depth and packed field width are both derived as 2^LEVEL_BITS.\n"
+            f"LEVEL_BITS := {LEVEL_BITS}\n"
             f"FENCE_MASKS_PARAM := {fence_masks_param}\n"
             f"FENCE_REQ_LEVELS_PACKED_PARAM := {fence_req_levels_packed_param}\n",
             encoding='utf-8',

target/verif/src/tb_hci.sv

@@ -542,17 +542,5 @@ module tb_hci
     end
   endgenerate
 
-  // Advisory check only. The hard overflow guard is in Python generation
-  // before packing FENCE_REQ_LEVELS into 4-bit fields.
-  // In case of failure due to this asser, modify tb_hci_pkg.sv and generation of fence_masks.mk
-  initial begin
-    if (MAX_FENCES > 16) begin
-      $warning(
-        "MAX_FENCES=%0d exceeds the nominal 4-bit fence-level range; "
-        "ensure no dependency requires a level > 15.",
-        MAX_FENCES
-      );
-    end
-  end
 
 endmodule

target/verif/src/tb_hci_pkg.sv

@@ -98,11 +98,13 @@ package tb_hci_pkg;
 // For a trailing pattern fence, the mask is zero and the fence is a free pass.
 //
 // Both arrays are generated by main.py and passed via defines.
+  // LEVEL_BITS: bits used to encode each required fence_idx value in the packed vector.
+  // Supports fence_idx values 0..2^LEVEL_BITS-1. Set in testbench.json.
+  localparam int unsigned LEVEL_BITS = `ifdef LEVEL_BITS `LEVEL_BITS `else 4 `endif;
+  // MAX_FENCES: depth of the fence arrays, sized to hold all encodable fence_idx values.
   localparam int unsigned MAX_FENCES = 2**LEVEL_BITS;
   localparam logic [N_DRIVERS-1:0] FENCE_MASKS [N_DRIVERS][MAX_FENCES] =
       `ifdef FENCE_MASKS_PARAM `FENCE_MASKS_PARAM `else '{default: '{default: '0}} `endif;
-  localparam int unsigned LEVEL_BITS =
-      `ifdef LEVEL_BITS `LEVEL_BITS `else 4 `endif;
   // FENCE_REQ_LEVELS_PACKED[i][f] is a packed vector of N_DRIVERS × LEVEL_BITS bits.
   // Bits [j*LEVEL_BITS+LEVEL_BITS-1:j*LEVEL_BITS] hold the required fence_idx[j] before driver i can pass fence f.
   localparam logic [N_DRIVERS*LEVEL_BITS-1:0] FENCE_REQ_LEVELS_PACKED [N_DRIVERS][MAX_FENCES] =