Boot Address for CVE2

[MikeOpenHWGroup]

Bug Description

The Exception and Interrupts section of the Reference Manual states:

The core starts fetching at the address made by concatenating the most significant 3 bytes of the boot address and the reset value (0x80) as the least significant byte.

I do not believe that this is the case. AFAICT, the cve2 starts fetching from boot_addr_i and that boot_addr_i must be 256-byte aligned. If that is true, the above is incorrect, as is this entry in the Interfaces Table of the User Manual.

[davideschiavone]

you are right @MikeOpenHWGroup - btw, shall we align the boot_addr to 4 bytes as the cv32e40p ? there is no good reason but legacy about the 256byte alignment

Here the cv32e40p: https://github.com/openhwgroup/cv32e40p/blob/master/rtl/cv32e40p_if_stage.sv#L160

[MikeOpenHWGroup]

shall we align the boot_addr to 4 bytes as the cv32e40p

I shall leave this decision to my betters. 😆 My goal is to ensure the Reference Manual and RTL are aligned. Let me know if you want to change the RTL and we'll create a PR to update both. Otherwise, I'll generate a PR to fix the documentation.

[MPEZZIN]

I agree with @davideschiavone. Having consistent behaviour among CoreV family may help.
In addition, CVE2 will be used in tiny systems. Word-size granularity in the address map will help end user to fine tune HW and SW size in such configurations, while keeping backward compatibility for existing SW.

[davideschiavone]

thanks @MPEZZIN , @MikeOpenHWGroup - here the PR #312