Merge branch 'devel'

Author: madcowswe

.travis.yml

@@ -45,11 +45,13 @@ env:
   - CONFIG_BOARD_VERSION=v3.4-48V DEPLOY=v3.4-48V
   - CONFIG_BOARD_VERSION=v3.5-24V DEPLOY=v3.5-24V
   - CONFIG_BOARD_VERSION=v3.5-48V DEPLOY=v3.5-48V
+  - CONFIG_BOARD_VERSION=v3.6-24V DEPLOY=v3.6-24V
+  - CONFIG_BOARD_VERSION=v3.6-56V DEPLOY=v3.6-56V
 
   # Various protocol combinations
-  - CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=native-stream CONFIG_UART_PROTOCOL=native
-  - CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=stdout CONFIG_UART_PROTOCOL=stdout
-  - CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=none CONFIG_UART_PROTOCOL=none
+  #- CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=native-stream CONFIG_UART_PROTOCOL=native
+  #- CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=stdout CONFIG_UART_PROTOCOL=stdout
+  #- CONFIG_BOARD_VERSION=v3.4-24V CONFIG_USB_PROTOCOL=none CONFIG_UART_PROTOCOL=none
 
 script:
 - "./Firmware/build.sh"

CHANGELOG.md

@@ -1,6 +1,21 @@
 # Unreleased Features
 Please add a note of your changes below this heading if you make a Pull Request.
 
+### Added
+* A release target for ODrive v3.6
+* Communication watchdog feature.
+* `encoder.set_linear_count(count)` function.
+* Configurable encoder offset calibration distance and speed:`calib_scan_distance` and `calib_scan_omega`
+* Encoder offset calibration debug variable `calib_scan_response`
+* Lock-in drive feature
+* Script to enable using a hall signal as index edge.
+
+### Changed
+* Encoder index search now based on the new lock-in drive feature
+
+### Fixed
+* Encoder index interrupts now disabled when not searching
+
 # Releases
 ## [0.4.8] - 2019-02-25
 ### Added
@@ -15,6 +30,9 @@ Please add a note of your changes below this heading if you make a Pull Request.
 * Voltage limit soft clamping instead of ERROR_MODULATION_MAGNITUDE in gimbal motor closed loop.
 * Thermal current limit with linear derating.
 
+### Changed
+* Unified lockin drive modes. Current for index searching and encoder offset calibration now moved to axis.lockin.current.
+
 ### Fixed
 * Added required 1.5 cycle phase shift between ADC and PWM, lack thereof caused unstable current controller at high eRPM.
 

Firmware/.vscode/c_cpp_properties.json

@@ -6,6 +6,7 @@
                 "${workspaceRoot}",
                 "${workspaceRoot}/fibre/cpp/include/**",
                 "${workspaceRoot}/MotorControl",
+                "${workspaceRoot}/communication",
                 "${workspaceRoot}/Drivers/DRV8301",
                 "${workspaceRoot}/Board/v3/Inc",
                 "${workspaceRoot}/Board/v3/Drivers/CMSIS/Include",
@@ -16,9 +17,7 @@
                 "${workspaceRoot}/Board/v3/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc",
                 "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS",
                 "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/include",
-                "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
-                "${ARM_GCC_ROOT}/arm-none-eabi/include/**",
-                "${ARM_GCC_ROOT}/lib/gcc/arm-none-eabi/**"
+                "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F"
             ],
             "defines": [
                 "STM32F405xx",
@@ -32,14 +31,7 @@
                 "__GNUC__"
             ],
             "intelliSenseMode": "clang-x64",
-            "browse": {
-                "path": [
-                    "${workspaceRoot}",
-                    "${ARM_GCC_ROOT}"
-                ],
-                "limitSymbolsToIncludedHeaders": true
-            },
-            "compilerPath": "${ARM_GCC_ROOT}/bin/arm-none-eabi-gcc.exe -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -specs=nosys.specs -specs=nano.specs -u _printf_float -u _scanf_float",
+            "compilerPath": "\"${ARM_GCC_ROOT}/bin/arm-none-eabi-gcc.exe\" -mthumb -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -specs=nosys.specs -specs=nano.specs -u _printf_float -u _scanf_float",
             "cStandard": "c11",
             "cppStandard": "c++14"
         },
@@ -49,6 +41,7 @@
                 "${workspaceRoot}",
                 "${workspaceRoot}/fibre/cpp/include/**",
                 "${workspaceRoot}/MotorControl",
+                "${workspaceRoot}/communication",
                 "${workspaceRoot}/Drivers/DRV8301",
                 "${workspaceRoot}/Board/v3/Inc",
                 "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",
@@ -92,6 +85,7 @@
                 "${workspaceRoot}",
                 "${workspaceRoot}/fibre/cpp/include/**",
                 "${workspaceRoot}/MotorControl",
+                "${workspaceRoot}/communication",
                 "${workspaceRoot}/Drivers/DRV8301",
                 "${workspaceRoot}/Board/v3/Inc",
                 "${workspaceRoot}/Board/v3/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F",

Firmware/Board/v3/Src/freertos.c

@@ -60,6 +60,7 @@
 #include "usb_device.h"
 extern PCD_HandleTypeDef hpcd_USB_OTG_FS;
 int odrive_main(void);
+int load_configuration(void);
 /* USER CODE END Includes */
 
 /* Private typedef -----------------------------------------------------------*/
@@ -187,6 +188,9 @@ void MX_FREERTOS_Init(void) {
   sem_usb_tx = osSemaphoreCreate(osSemaphore(sem_usb_tx), 1);
 
   init_deferred_interrupts();
+
+  // Load persistent configuration (or defaults)
+  load_configuration();
   /* USER CODE END RTOS_SEMAPHORES */
 
   /* USER CODE BEGIN RTOS_TIMERS */

Firmware/Board/v3/Src/stm32f4xx_it.c

@@ -91,22 +91,34 @@ void NMI_Handler(void)
   /* USER CODE END NonMaskableInt_IRQn 1 */
 }
 
+void get_regs(void** stack_ptr) {
+  void* volatile r0 __attribute__((unused)) = stack_ptr[0];
+  void* volatile r1 __attribute__((unused)) = stack_ptr[1];
+  void* volatile r2 __attribute__((unused)) = stack_ptr[2];
+  void* volatile r3 __attribute__((unused)) = stack_ptr[3];
+
+  void* volatile r12 __attribute__((unused)) = stack_ptr[4];
+  void* volatile lr __attribute__((unused)) = stack_ptr[5];  // Link register
+  void* volatile pc __attribute__((unused)) = stack_ptr[6];  // Program counter
+  void* volatile psr __attribute__((unused)) = stack_ptr[7];  // Program status register
+
+  volatile bool stay_looping = true;
+  while(stay_looping);
+}
+
 /**
 * @brief This function handles Hard fault interrupt.
 */
+__attribute__((naked))
 void HardFault_Handler(void)
 {
-  /* USER CODE BEGIN HardFault_IRQn 0 */
-
-  /* USER CODE END HardFault_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-    /* USER CODE END W1_HardFault_IRQn 0 */
-  }
-  /* USER CODE BEGIN HardFault_IRQn 1 */
-
-  /* USER CODE END HardFault_IRQn 1 */
+  __asm(
+    " tst lr, #4     \n\t"
+    " ite eq         \n\t"
+    " mrseq r0, msp  \n\t"
+    " mrsne r0, psp  \n\t"
+    " b get_regs     \n\t"
+  );
 }
 
 /**

Firmware/Makefile

@@ -40,6 +40,10 @@ erase:
 erase_config:
 	$(OPENOCD) -c init -c reset\ halt -c flash\ erase_address\ 0x80C0000\ 0x40000 -c reset\ init -c reset\ run -c exit
 
+# Sometimes the STM32 will get it's protection bits set for unknown reasons. Unlock it with this command
+unlock:
+	$(OPENOCD) -c init -c reset\ halt -c stm32f2x\ unlock\ 0
+
 # The one-time programmable memory stores the board version
 # has the following format:
 #  - OTP format version (0xFE: version 1)