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1 parent 05eb7bb commit 92a0a65Copy full SHA for 92a0a65
llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
@@ -89,6 +89,8 @@ bool AMDGPURewriteAGPRCopyMFMAImpl::recomputeRegClassExceptRewritable(
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// Inflate to the equivalent AV_* class.
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const TargetRegisterClass *NewRC = TRI.getLargestLegalSuperClass(OldRC, MF);
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+ if (OldRC == NewRC)
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+ return false;
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// Accumulate constraints from all uses.
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for (MachineOperand &MO : MRI.reg_nodbg_operands(Reg)) {
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