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[SimplfyCFG] Set MD_prof for select used for certain conditional simplifications
1 parent 495adb3 commit 386761d

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4 files changed

+76
-32
lines changed

4 files changed

+76
-32
lines changed

‎llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -203,6 +203,8 @@ static cl::opt<unsigned> MaxJumpThreadingLiveBlocks(
203203
cl::desc("Limit number of blocks a define in a threaded block is allowed "
204204
"to be live in"));
205205

206+
extern cl::opt<bool> ProfcheckDisableMetadataFixes;
207+
206208
STATISTIC(NumBitMaps, "Number of switch instructions turned into bitmaps");
207209
STATISTIC(NumLinearMaps,
208210
"Number of switch instructions turned into linear mapping");
@@ -330,6 +332,13 @@ class SimplifyCFGOpt {
330332
}
331333
};
332334

335+
bool isSelectInRoleOfConjunctionOrDisjunction(const SelectInst *SI) {
336+
return ((isa<ConstantInt>(SI->getTrueValue()) &&
337+
(dyn_cast<ConstantInt>(SI->getTrueValue())->isOne())) ||
338+
(isa<ConstantInt>(SI->getFalseValue()) &&
339+
(dyn_cast<ConstantInt>(SI->getFalseValue())->isNullValue())));
340+
}
341+
333342
} // end anonymous namespace
334343

335344
/// Return true if all the PHI nodes in the basic block \p BB
@@ -4024,6 +4033,7 @@ static bool performBranchToCommonDestFolding(BranchInst *BI, BranchInst *PBI,
40244033

40254034
// Try to update branch weights.
40264035
uint64_t PredTrueWeight, PredFalseWeight, SuccTrueWeight, SuccFalseWeight;
4036+
SmallVector<uint32_t, 2> MDWeights;
40274037
if (extractPredSuccWeights(PBI, BI, PredTrueWeight, PredFalseWeight,
40284038
SuccTrueWeight, SuccFalseWeight)) {
40294039
SmallVector<uint64_t, 8> NewWeights;
@@ -4054,7 +4064,7 @@ static bool performBranchToCommonDestFolding(BranchInst *BI, BranchInst *PBI,
40544064
// Halve the weights if any of them cannot fit in an uint32_t
40554065
fitWeights(NewWeights);
40564066

4057-
SmallVector<uint32_t, 8> MDWeights(NewWeights.begin(), NewWeights.end());
4067+
append_range(MDWeights, NewWeights);
40584068
setBranchWeights(PBI, MDWeights[0], MDWeights[1], /*IsExpected=*/false);
40594069

40604070
// TODO: If BB is reachable from all paths through PredBlock, then we
@@ -4091,6 +4101,13 @@ static bool performBranchToCommonDestFolding(BranchInst *BI, BranchInst *PBI,
40914101
Value *BICond = VMap[BI->getCondition()];
40924102
PBI->setCondition(
40934103
createLogicalOp(Builder, Opc, PBI->getCondition(), BICond, "or.cond"));
4104+
if (!ProfcheckDisableMetadataFixes)
4105+
if (auto *SI = dyn_cast<SelectInst>(PBI->getCondition()))
4106+
if (!MDWeights.empty()) {
4107+
assert(isSelectInRoleOfConjunctionOrDisjunction(SI));
4108+
setBranchWeights(SI, MDWeights[0], MDWeights[1],
4109+
/*IsExpected=*/false);
4110+
}
40944111

40954112
++NumFoldBranchToCommonDest;
40964113
return true;
@@ -4789,6 +4806,14 @@ static bool SimplifyCondBranchToCondBranch(BranchInst *PBI, BranchInst *BI,
47894806
fitWeights(NewWeights);
47904807

47914808
setBranchWeights(PBI, NewWeights[0], NewWeights[1], /*IsExpected=*/false);
4809+
// Cond may be a select instruction with the first operand set to "true", or
4810+
// the second to "false" (see how createLogicalOp works for `and` and `or`)
4811+
if (!ProfcheckDisableMetadataFixes)
4812+
if (auto *SI = dyn_cast<SelectInst>(Cond)) {
4813+
assert(isSelectInRoleOfConjunctionOrDisjunction(SI));
4814+
setBranchWeights(SI, NewWeights[0], NewWeights[1],
4815+
/*IsExpected=*/false);
4816+
}
47924817
}
47934818

47944819
// OtherDest may have phi nodes. If so, add an entry from PBI's

‎llvm/test/Transforms/SimplifyCFG/branch-fold-threshold.ll

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
22
; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s --check-prefixes=NORMAL,BASELINE
33
; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S -bonus-inst-threshold=2 | FileCheck %s --check-prefixes=NORMAL,AGGRESSIVE
44
; RUN: opt %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S -bonus-inst-threshold=4 | FileCheck %s --check-prefixes=WAYAGGRESSIVE
@@ -11,12 +11,12 @@ define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
1111
; BASELINE-SAME: i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32 [[D:%.*]], ptr [[INPUT:%.*]]) {
1212
; BASELINE-NEXT: [[ENTRY:.*]]:
1313
; BASELINE-NEXT: [[CMP:%.*]] = icmp sgt i32 [[D]], 3
14-
; BASELINE-NEXT: br i1 [[CMP]], label %[[COND_END:.*]], label %[[LOR_LHS_FALSE:.*]]
14+
; BASELINE-NEXT: br i1 [[CMP]], label %[[COND_END:.*]], label %[[LOR_LHS_FALSE:.*]], !prof [[PROF0:![0-9]+]]
1515
; BASELINE: [[LOR_LHS_FALSE]]:
1616
; BASELINE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
1717
; BASELINE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
1818
; BASELINE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
19-
; BASELINE-NEXT: br i1 [[CMP1]], label %[[COND_FALSE:.*]], label %[[COND_END]]
19+
; BASELINE-NEXT: br i1 [[CMP1]], label %[[COND_FALSE:.*]], label %[[COND_END]], !prof [[PROF1:![0-9]+]]
2020
; BASELINE: [[COND_FALSE]]:
2121
; BASELINE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
2222
; BASELINE-NEXT: br label %[[COND_END]]
@@ -31,8 +31,8 @@ define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
3131
; AGGRESSIVE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
3232
; AGGRESSIVE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
3333
; AGGRESSIVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
34-
; AGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
35-
; AGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]]
34+
; AGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false, !prof [[PROF0:![0-9]+]]
35+
; AGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]], !prof [[PROF0]]
3636
; AGGRESSIVE: [[COND_FALSE]]:
3737
; AGGRESSIVE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
3838
; AGGRESSIVE-NEXT: br label %[[COND_END]]
@@ -47,8 +47,8 @@ define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
4747
; WAYAGGRESSIVE-NEXT: [[MUL:%.*]] = shl i32 [[C]], 1
4848
; WAYAGGRESSIVE-NEXT: [[ADD:%.*]] = add nsw i32 [[MUL]], [[A]]
4949
; WAYAGGRESSIVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[ADD]], [[B]]
50-
; WAYAGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
51-
; WAYAGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]]
50+
; WAYAGGRESSIVE-NEXT: [[OR_COND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false, !prof [[PROF0:![0-9]+]]
51+
; WAYAGGRESSIVE-NEXT: br i1 [[OR_COND]], label %[[COND_FALSE:.*]], label %[[COND_END:.*]], !prof [[PROF0]]
5252
; WAYAGGRESSIVE: [[COND_FALSE]]:
5353
; WAYAGGRESSIVE-NEXT: [[TMP0:%.*]] = load i32, ptr [[INPUT]], align 4
5454
; WAYAGGRESSIVE-NEXT: br label %[[COND_END]]
@@ -58,13 +58,13 @@ define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d, ptr %input) {
5858
;
5959
entry:
6060
%cmp = icmp sgt i32 %d, 3
61-
br i1 %cmp, label %cond.end, label %lor.lhs.false
61+
br i1 %cmp, label %cond.end, label %lor.lhs.false, !prof !0
6262

6363
lor.lhs.false:
6464
%mul = shl i32 %c, 1
6565
%add = add nsw i32 %mul, %a
6666
%cmp1 = icmp slt i32 %add, %b
67-
br i1 %cmp1, label %cond.false, label %cond.end
67+
br i1 %cmp1, label %cond.false, label %cond.end, !prof !1
6868

6969
cond.false:
7070
%0 = load i32, ptr %input, align 4
@@ -160,3 +160,14 @@ cond.end:
160160
%cond = phi i32 [ %0, %cond.false ], [ 0, %lor.lhs.false ],[ 0, %pred_a ],[ 0, %pred_b ]
161161
ret i32 %cond
162162
}
163+
164+
!0 = !{!"branch_weights", i32 7, i32 11}
165+
!1 = !{!"branch_weights", i32 13, i32 5}
166+
;.
167+
; BASELINE: [[PROF0]] = !{!"branch_weights", i32 7, i32 11}
168+
; BASELINE: [[PROF1]] = !{!"branch_weights", i32 13, i32 5}
169+
;.
170+
; AGGRESSIVE: [[PROF0]] = !{!"branch_weights", i32 143, i32 181}
171+
;.
172+
; WAYAGGRESSIVE: [[PROF0]] = !{!"branch_weights", i32 143, i32 181}
173+
;.

‎llvm/test/Transforms/SimplifyCFG/branch-fold.ll

Lines changed: 13 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
22
; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
33

44
define void @test(ptr %P, ptr %Q, i1 %A, i1 %B) {
55
; CHECK-LABEL: @test(
66
; CHECK-NEXT: entry:
77
; CHECK-NEXT: [[A_NOT:%.*]] = xor i1 [[A:%.*]], true
8-
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[A_NOT]], i1 true, i1 [[B:%.*]]
9-
; CHECK-NEXT: br i1 [[BRMERGE]], label [[B:%.*]], label [[COMMON_RET:%.*]]
8+
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[A_NOT]], i1 true, i1 [[B:%.*]], !prof [[PROF0:![0-9]+]]
9+
; CHECK-NEXT: br i1 [[BRMERGE]], label [[B:%.*]], label [[COMMON_RET:%.*]], !prof [[PROF0]]
1010
; CHECK: common.ret:
1111
; CHECK-NEXT: ret void
1212
; CHECK: b:
@@ -15,9 +15,9 @@ define void @test(ptr %P, ptr %Q, i1 %A, i1 %B) {
1515
;
1616

1717
entry:
18-
br i1 %A, label %a, label %b
18+
br i1 %A, label %a, label %b, !prof !0
1919
a:
20-
br i1 %B, label %b, label %c
20+
br i1 %B, label %b, label %c, !prof !1
2121
b:
2222
store i32 123, ptr %P
2323
ret void
@@ -146,3 +146,11 @@ Succ:
146146
}
147147

148148
declare void @dummy()
149+
150+
!0 = !{!"branch_weights", i32 3, i32 7}
151+
!1 = !{!"branch_weights", i32 11, i32 4}
152+
;.
153+
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind ssp memory(read) uwtable }
154+
;.
155+
; CHECK: [[PROF0]] = !{!"branch_weights", i32 138, i32 12}
156+
;.

‎llvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -268,8 +268,8 @@ define void @test7(i1 %a, i1 %b) {
268268
; CHECK-LABEL: @test7(
269269
; CHECK-NEXT: entry:
270270
; CHECK-NEXT: [[C:%.*]] = or i1 [[B:%.*]], false
271-
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[C]]
272-
; CHECK-NEXT: br i1 [[BRMERGE]], label [[Y:%.*]], label [[Z:%.*]], !prof [[PROF6:![0-9]+]]
271+
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[C]], !prof [[PROF6:![0-9]+]]
272+
; CHECK-NEXT: br i1 [[BRMERGE]], label [[Y:%.*]], label [[Z:%.*]], !prof [[PROF6]]
273273
; CHECK: common.ret:
274274
; CHECK-NEXT: ret void
275275
; CHECK: Y:
@@ -557,9 +557,9 @@ return:
557557
define i32 @SimplifyCondBranchToCondBranch(i1 %cmpa, i1 %cmpb) {
558558
; CHECK-LABEL: @SimplifyCondBranchToCondBranch(
559559
; CHECK-NEXT: block1:
560-
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA:%.*]], i1 true, i1 [[CMPB:%.*]]
561-
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA]], i32 0, i32 2, !prof [[PROF13:![0-9]+]]
562-
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF14:![0-9]+]]
560+
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA:%.*]], i1 true, i1 [[CMPB:%.*]], !prof [[PROF13:![0-9]+]]
561+
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA]], i32 0, i32 2, !prof [[PROF14:![0-9]+]]
562+
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF13]]
563563
; CHECK-NEXT: ret i32 [[OUTVAL]]
564564
;
565565
block1:
@@ -584,9 +584,9 @@ define i32 @SimplifyCondBranchToCondBranchSwap(i1 %cmpa, i1 %cmpb) {
584584
; CHECK-NEXT: block1:
585585
; CHECK-NEXT: [[CMPA_NOT:%.*]] = xor i1 [[CMPA:%.*]], true
586586
; CHECK-NEXT: [[CMPB_NOT:%.*]] = xor i1 [[CMPB:%.*]], true
587-
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA_NOT]], i1 true, i1 [[CMPB_NOT]]
588-
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA_NOT]], i32 0, i32 2, !prof [[PROF15:![0-9]+]]
589-
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF16:![0-9]+]]
587+
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA_NOT]], i1 true, i1 [[CMPB_NOT]], !prof [[PROF15:![0-9]+]]
588+
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA_NOT]], i32 0, i32 2, !prof [[PROF16:![0-9]+]]
589+
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF15]]
590590
; CHECK-NEXT: ret i32 [[OUTVAL]]
591591
;
592592
block1:
@@ -609,9 +609,9 @@ define i32 @SimplifyCondBranchToCondBranchSwapMissingWeight(i1 %cmpa, i1 %cmpb)
609609
; CHECK-NEXT: block1:
610610
; CHECK-NEXT: [[CMPA_NOT:%.*]] = xor i1 [[CMPA:%.*]], true
611611
; CHECK-NEXT: [[CMPB_NOT:%.*]] = xor i1 [[CMPB:%.*]], true
612-
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA_NOT]], i1 true, i1 [[CMPB_NOT]]
613-
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA_NOT]], i32 0, i32 2, !prof [[PROF17:![0-9]+]]
614-
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF18:![0-9]+]]
612+
; CHECK-NEXT: [[BRMERGE:%.*]] = select i1 [[CMPA_NOT]], i1 true, i1 [[CMPB_NOT]], !prof [[PROF17:![0-9]+]]
613+
; CHECK-NEXT: [[DOTMUX:%.*]] = select i1 [[CMPA_NOT]], i32 0, i32 2, !prof [[PROF18:![0-9]+]]
614+
; CHECK-NEXT: [[OUTVAL:%.*]] = select i1 [[BRMERGE]], i32 [[DOTMUX]], i32 1, !prof [[PROF17]]
615615
; CHECK-NEXT: ret i32 [[OUTVAL]]
616616
;
617617
block1:
@@ -1114,12 +1114,12 @@ exit:
11141114
; CHECK: [[PROF10]] = !{!"branch_weights", i32 8, i32 33}
11151115
; CHECK: [[PROF11]] = !{!"branch_weights", i32 112017436, i32 -735157296}
11161116
; CHECK: [[PROF12]] = !{!"branch_weights", i32 3, i32 5}
1117-
; CHECK: [[PROF13]] = !{!"branch_weights", i32 22, i32 12}
1118-
; CHECK: [[PROF14]] = !{!"branch_weights", i32 34, i32 21}
1119-
; CHECK: [[PROF15]] = !{!"branch_weights", i32 33, i32 14}
1120-
; CHECK: [[PROF16]] = !{!"branch_weights", i32 47, i32 8}
1121-
; CHECK: [[PROF17]] = !{!"branch_weights", i32 6, i32 2}
1122-
; CHECK: [[PROF18]] = !{!"branch_weights", i32 8, i32 2}
1117+
; CHECK: [[PROF13]] = !{!"branch_weights", i32 34, i32 21}
1118+
; CHECK: [[PROF14]] = !{!"branch_weights", i32 22, i32 12}
1119+
; CHECK: [[PROF15]] = !{!"branch_weights", i32 47, i32 8}
1120+
; CHECK: [[PROF16]] = !{!"branch_weights", i32 33, i32 14}
1121+
; CHECK: [[PROF17]] = !{!"branch_weights", i32 8, i32 2}
1122+
; CHECK: [[PROF18]] = !{!"branch_weights", i32 6, i32 2}
11231123
; CHECK: [[PROF19]] = !{!"branch_weights", i32 99, i32 1}
11241124
; CHECK: [[PROF20]] = !{!"branch_weights", i32 1, i32 99}
11251125
; CHECK: [[PROF21]] = !{!"branch_weights", i32 199, i32 1}

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