|
46 | 46 | #define SNDK_NVME_SNTMP_DEV_ID 0x2761 |
47 | 47 | #define SNDK_NVME_SNTMP_DEV_ID_1 0x2763 |
48 | 48 |
|
| 49 | +#define SNDK_NVME_SNESSD1_DEV_ID_E1L 0x2765 |
| 50 | +#define SNDK_NVME_SNESSD1_DEV_ID_E2 0x2766 |
| 51 | +#define SNDK_NVME_SNESSD1_DEV_ID_E3S 0x2767 |
| 52 | +#define SNDK_NVME_SNESSD1_DEV_ID_E3L 0x2768 |
| 53 | +#define SNDK_NVME_SNESSD1_DEV_ID_U2 0x2769 |
| 54 | + |
49 | 55 | #define SNDK_NVME_SN520_DEV_ID 0x5003 |
50 | 56 | #define SNDK_NVME_SN520_DEV_ID_1 0x5004 |
51 | 57 | #define SNDK_NVME_SN520_DEV_ID_2 0x5005 |
|
75 | 81 | #define SNDK_NVME_SN7150_DEV_ID_4 0x503e |
76 | 82 | #define SNDK_NVME_SN7150_DEV_ID_5 0x503f |
77 | 83 |
|
| 84 | +#define SNDK_NVME_SNCSSD1_DEV_ID_M2_2230 0x5081 |
| 85 | +#define SNDK_NVME_SNCSSD1_DEV_ID_M2_2242 0x5082 |
| 86 | +#define SNDK_NVME_SNCSSD1_DEV_ID_M2_2280 0x5083 |
| 87 | + |
78 | 88 | #define SNDK_NVME_SN7100_DEV_ID_1 0x5043 |
79 | 89 | #define SNDK_NVME_SN7100_DEV_ID_2 0x5044 |
80 | 90 | #define SNDK_NVME_SN7100_DEV_ID_3 0x5045 |
|
108 | 118 | #define SNDK_DRIVE_CAP_CLEAR_PCIE 0x0000000000000080 |
109 | 119 | #define SNDK_DRIVE_CAP_RESIZE 0x0000000000000100 |
110 | 120 | #define SNDK_DRIVE_CAP_NAND_STATS 0x0000000000000200 |
111 | | -#define SNDK_DRIVE_CAP_RESIZE_SN861 0x0000000000000400 |
| 121 | +#define SNDK_DRIVE_CAP_RESERVED2 0x0000000000000400 |
112 | 122 | #define SNDK_DRIVE_CAP_RESERVED3 0x0000000000000800 |
113 | 123 | #define SNDK_DRIVE_CAP_RESERVED4 0x0000000000001000 |
114 | 124 | #define SNDK_DRIVE_CAP_FW_ACTIVATE_HISTORY 0x0000000000002000 |
|
141 | 151 | #define SNDK_DRIVE_CAP_DEVICE_WAF 0x0000010000000000 |
142 | 152 | #define SNDK_DRIVE_CAP_SET_LATENCY_MONITOR 0x0000020000000000 |
143 | 153 | #define SNDK_DRIVE_CAP_UDUI 0x0000040000000000 |
| 154 | +#define SNDK_DRIVE_CAP_RESIZE_SN861 0x0000080000000000 |
144 | 155 |
|
145 | 156 | /* Any new capability flags should be added to the WDC plugin */ |
146 | 157 |
|
|
0 commit comments