diff --git a/sycl/include/sycl/__spirv/spirv_vars.hpp b/sycl/include/sycl/__spirv/spirv_vars.hpp index 1609539dd4c5e..3ed635dee7ba0 100644 --- a/sycl/include/sycl/__spirv/spirv_vars.hpp +++ b/sycl/include/sycl/__spirv/spirv_vars.hpp @@ -17,19 +17,31 @@ // SPIR-V built-in variables mapped to function call. -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInGlobalInvocationId(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInGlobalSize(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInGlobalOffset(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInNumWorkgroups(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInWorkgroupSize(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInWorkgroupId(int); -__DPCPP_SYCL_EXTERNAL size_t __spirv_BuiltInLocalInvocationId(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInGlobalInvocationId(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInGlobalSize(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInGlobalOffset(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInNumWorkgroups(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInWorkgroupSize(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInWorkgroupId(int); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) size_t +__spirv_BuiltInLocalInvocationId(int); -__DPCPP_SYCL_EXTERNAL uint32_t __spirv_BuiltInSubgroupSize(); -__DPCPP_SYCL_EXTERNAL uint32_t __spirv_BuiltInSubgroupMaxSize(); -__DPCPP_SYCL_EXTERNAL uint32_t __spirv_BuiltInNumSubgroups(); -__DPCPP_SYCL_EXTERNAL uint32_t __spirv_BuiltInSubgroupId(); -__DPCPP_SYCL_EXTERNAL uint32_t __spirv_BuiltInSubgroupLocalInvocationId(); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) uint32_t +__spirv_BuiltInSubgroupSize(); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) uint32_t +__spirv_BuiltInSubgroupMaxSize(); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) uint32_t +__spirv_BuiltInNumSubgroups(); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) uint32_t +__spirv_BuiltInSubgroupId(); +__DPCPP_SYCL_EXTERNAL __attribute__((const)) uint32_t +__spirv_BuiltInSubgroupLocalInvocationId(); namespace __spirv { diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp index 40a0cfab2c601..b48e15c555416 100644 --- a/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp +++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp @@ -25,11 +25,11 @@ int main() { auto Redu1 = sycl::reduction(nullptr, sycl::plus()); auto Redu2 = sycl::reduction(nullptr, sycl::multiplies()); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel0(){{.*}} #[[SGSizeAttr1:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel0(){{.*}} #[[SGSizeAttr0:[0-9]+]] Q.single_task(Props, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel1(){{.*}} #[[SGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel1(){{.*}} #[[SGSizeAttr0]] Q.single_task(Ev, Props, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel2(){{.*}} #[[SGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel2(){{.*}} #[[SGSizeAttr0]] Q.single_task({Ev}, Props, []() {}); // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel9(){{.*}} #[[SGSizeAttr2:[0-9]+]] @@ -79,28 +79,28 @@ int main() { Q.parallel_for(R3, {Ev}, Props, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel27(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel27(){{.*}} #[[SGSizeAttr6:[0-9]+]] Q.parallel_for(NDR1, Props, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel28(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel28(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR1, Ev, Props, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel29(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel29(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR1, {Ev}, Props, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel30(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel30(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR2, Props, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel31(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel31(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR2, Ev, Props, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel32(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel32(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR2, {Ev}, Props, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel33(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel33(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR3, Props, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel34(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel34(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR3, Ev, Props, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel35(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel35(){{.*}} #[[SGSizeAttr6]] Q.parallel_for(NDR3, {Ev}, Props, [](sycl::nd_item<3>) {}); @@ -160,15 +160,15 @@ int main() { Q.parallel_for(NDR3, {Ev}, Props, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel54(){{.*}} #[[SGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel54(){{.*}} #[[SGSizeAttr0]] Q.submit([&](sycl::handler &CGH) { CGH.single_task(Props, []() {}); }); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel55(){{.*}} #[[SGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel55(){{.*}} #[[SGSizeAttr0]] Q.submit([&](sycl::handler &CGH) { CGH.single_task(Props, []() {}); }); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel56(){{.*}} #[[SGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel56(){{.*}} #[[SGSizeAttr0]] Q.submit([&](sycl::handler &CGH) { CGH.single_task(Props, []() {}); }); @@ -202,17 +202,17 @@ int main() { [](sycl::id<3>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel63(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel63(){{.*}} #[[SGSizeAttr6]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR1, Props, [](sycl::nd_item<1>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel64(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel64(){{.*}} #[[SGSizeAttr6]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR2, Props, [](sycl::nd_item<2>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel65(){{.*}} #[[SGSizeAttr2]] + // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel65(){{.*}} #[[SGSizeAttr6]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR3, Props, [](sycl::nd_item<3>) {}); @@ -275,5 +275,6 @@ int main() { return 0; } -// CHECK-IR: attributes #[[SGSizeAttr1]] = { {{.*}}"sycl-sub-group-size"="1" +// CHECK-IR: attributes #[[SGSizeAttr0]] = { {{.*}}"sycl-sub-group-size"="1" // CHECK-IR: attributes #[[SGSizeAttr2]] = { {{.*}}"sycl-sub-group-size"="1" +// CHECK-IR: attributes #[[SGSizeAttr6]] = { {{.*}}"sycl-sub-group-size"="1" diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp index 7ca3aac5cfc8c..a11202e8694a9 100644 --- a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp +++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp @@ -29,11 +29,11 @@ int main() { auto Redu1 = sycl::reduction(nullptr, sycl::plus()); auto Redu2 = sycl::reduction(nullptr, sycl::multiplies()); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel0(){{.*}} #[[WGSizeAttr1:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel0(){{.*}} #[[WGSizeAttr0:[0-9]+]] Q.single_task(Props1, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel1(){{.*}} #[[WGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel1(){{.*}} #[[WGSizeAttr0]] Q.single_task(Ev, Props1, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel2(){{.*}} #[[WGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel2(){{.*}} #[[WGSizeAttr0]] Q.single_task({Ev}, Props1, []() {}); // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel3(){{.*}} #[[WGSizeAttr2:[0-9]+]] Q.single_task(Props2, []() {}); @@ -54,129 +54,129 @@ int main() { Q.parallel_for(R1, Ev, Props1, [](sycl::id<1>) {}); // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel11(){{.*}} #[[WGSizeAttr4]] Q.parallel_for(R1, {Ev}, Props1, [](sycl::id<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel12(){{.*}} #[[WGSizeAttr5:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel12(){{.*}} #[[WGSizeAttr7:[0-9]+]] Q.parallel_for(R2, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel13(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel13(){{.*}} #[[WGSizeAttr7]] Q.parallel_for(R2, Ev, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel14(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel14(){{.*}} #[[WGSizeAttr7]] Q.parallel_for(R2, {Ev}, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel15(){{.*}} #[[WGSizeAttr6:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel15(){{.*}} #[[WGSizeAttr8:[0-9]+]] Q.parallel_for(R3, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel16(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel16(){{.*}} #[[WGSizeAttr8]] Q.parallel_for(R3, Ev, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel17(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel17(){{.*}} #[[WGSizeAttr8]] Q.parallel_for(R3, {Ev}, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel18{{.*}}{{.*}} #[[WGSizeAttr7:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel18{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(R1, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel19{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel19{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(R1, Ev, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel20{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel20{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(R1, {Ev}, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel21{{.*}}{{.*}} #[[WGSizeAttr8:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel21{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(R2, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel22{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel22{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(R2, Ev, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel23{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel23{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(R2, {Ev}, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel24{{.*}}{{.*}} #[[WGSizeAttr9:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel24{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(R3, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel25{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel25{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(R3, Ev, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel26{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel26{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(R3, {Ev}, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel27(){{.*}} #[[WGSizeAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel27(){{.*}} #[[WGSizeAttr10:[0-9]+]] Q.parallel_for(NDR1, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel28(){{.*}} #[[WGSizeAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel28(){{.*}} #[[WGSizeAttr10]] Q.parallel_for(NDR1, Ev, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel29(){{.*}} #[[WGSizeAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel29(){{.*}} #[[WGSizeAttr10]] Q.parallel_for(NDR1, {Ev}, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel30(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel30(){{.*}} #[[WGSizeAttr11:[0-9]+]] Q.parallel_for(NDR2, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel31(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel31(){{.*}} #[[WGSizeAttr11]] Q.parallel_for(NDR2, Ev, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel32(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel32(){{.*}} #[[WGSizeAttr11]] Q.parallel_for(NDR2, {Ev}, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel33(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel33(){{.*}} #[[WGSizeAttr12:[0-9]+]] Q.parallel_for(NDR3, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel34(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel34(){{.*}} #[[WGSizeAttr12]] Q.parallel_for(NDR3, Ev, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel35(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel35(){{.*}} #[[WGSizeAttr12]] Q.parallel_for(NDR3, {Ev}, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel36{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel36{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel37{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel37{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, Ev, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel38{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel38{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, {Ev}, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel39{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel39{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel40{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel40{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, Ev, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel41{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel41{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, {Ev}, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel42{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel42{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel43{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel43{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, Ev, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel44{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel44{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, {Ev}, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel45{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel45{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel46{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel46{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, Ev, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel47{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel47{{.*}}{{.*}} #[[WGSizeAttr4]] Q.parallel_for(NDR1, {Ev}, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel48{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel48{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel49{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel49{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, Ev, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel50{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel50{{.*}}{{.*}} #[[WGSizeAttr7]] Q.parallel_for(NDR2, {Ev}, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel51{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel51{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel52{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel52{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, Ev, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel53{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel53{{.*}}{{.*}} #[[WGSizeAttr8]] Q.parallel_for(NDR3, {Ev}, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel54(){{.*}} #[[WGSizeAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel54(){{.*}} #[[WGSizeAttr0]] Q.submit([&](sycl::handler &CGH) { CGH.single_task(Props1, []() {}); }); @@ -193,74 +193,74 @@ int main() { Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R1, Props1, [](sycl::id<1>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel58(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel58(){{.*}} #[[WGSizeAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R2, Props2, [](sycl::id<2>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel59(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel59(){{.*}} #[[WGSizeAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R3, Props3, [](sycl::id<3>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel60{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel60{{.*}}{{.*}} #[[WGSizeAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R1, Props1, Redu1, [](sycl::id<1>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel61{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel61{{.*}}{{.*}} #[[WGSizeAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R2, Props2, Redu1, [](sycl::id<2>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel62{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel62{{.*}}{{.*}} #[[WGSizeAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R3, Props3, Redu1, [](sycl::id<3>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel63(){{.*}} #[[WGSizeAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel63(){{.*}} #[[WGSizeAttr10]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR1, Props1, [](sycl::nd_item<1>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel64(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel64(){{.*}} #[[WGSizeAttr11]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR2, Props2, [](sycl::nd_item<2>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel65(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel65(){{.*}} #[[WGSizeAttr12]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR3, Props3, [](sycl::nd_item<3>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel66{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel66{{.*}}{{.*}} #[[WGSizeAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR1, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel67{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel67{{.*}}{{.*}} #[[WGSizeAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR2, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel68{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel68{{.*}}{{.*}} #[[WGSizeAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR3, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel69{{.*}}{{.*}} #[[WGSizeAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel69{{.*}}{{.*}} #[[WGSizeAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel70{{.*}}{{.*}} #[[WGSizeAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel70{{.*}}{{.*}} #[[WGSizeAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel71{{.*}}{{.*}} #[[WGSizeAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel71{{.*}}{{.*}} #[[WGSizeAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); @@ -273,14 +273,14 @@ int main() { G.parallel_for_work_item([&](sycl::h_item<1>) {}); }); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel73(){{.*}} #[[WGSizeAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel73(){{.*}} #[[WGSizeAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for_work_group( R2, Props2, [](sycl::group<2> G) { G.parallel_for_work_item([&](sycl::h_item<2>) {}); }); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel74(){{.*}} #[[WGSizeAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel74(){{.*}} #[[WGSizeAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for_work_group( R3, Props3, [](sycl::group<3> G) { @@ -291,9 +291,12 @@ int main() { return 0; } -// CHECK-IR: attributes #[[WGSizeAttr1]] = { {{.*}}"sycl-work-group-size"="1" +// CHECK-IR: attributes #[[WGSizeAttr0]] = { {{.*}}"sycl-work-group-size"="1" // CHECK-IR: attributes #[[WGSizeAttr2]] = { {{.*}}"sycl-work-group-size"="1,2" // CHECK-IR: attributes #[[WGSizeAttr3]] = { {{.*}}"sycl-work-group-size"="1,2,3" // CHECK-IR: attributes #[[WGSizeAttr4]] = { {{.*}}"sycl-work-group-size"="1" -// CHECK-IR: attributes #[[WGSizeAttr5]] = { {{.*}}"sycl-work-group-size"="1,2" -// CHECK-IR: attributes #[[WGSizeAttr6]] = { {{.*}}"sycl-work-group-size"="1,2,3" +// CHECK-IR: attributes #[[WGSizeAttr7]] = { {{.*}}"sycl-work-group-size"="1,2" +// CHECK-IR: attributes #[[WGSizeAttr8]] = { {{.*}}"sycl-work-group-size"="1,2,3" +// CHECK-IR: attributes #[[WGSizeAttr10]] = { {{.*}}"sycl-work-group-size"="1" +// CHECK-IR: attributes #[[WGSizeAttr11]] = { {{.*}}"sycl-work-group-size"="1,2" +// CHECK-IR: attributes #[[WGSizeAttr12]] = { {{.*}}"sycl-work-group-size"="1,2,3" diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp index e667dd4ead471..b194b44c935bd 100644 --- a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp +++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp @@ -29,11 +29,11 @@ int main() { auto Redu1 = sycl::reduction(nullptr, sycl::plus()); auto Redu2 = sycl::reduction(nullptr, sycl::multiplies()); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel0(){{.*}} #[[WGSizeHintAttr1:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel0(){{.*}} #[[WGSizeHintAttr0:[0-9]+]] Q.single_task(Props1, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel1(){{.*}} #[[WGSizeHintAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel1(){{.*}} #[[WGSizeHintAttr0]] Q.single_task(Ev, Props1, []() {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel2(){{.*}} #[[WGSizeHintAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel2(){{.*}} #[[WGSizeHintAttr0]] Q.single_task({Ev}, Props1, []() {}); // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel3(){{.*}} #[[WGSizeHintAttr2:[0-9]+]] Q.single_task(Props2, []() {}); @@ -55,137 +55,137 @@ int main() { // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel11(){{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(R1, {Ev}, Props1, [](sycl::id<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel12(){{.*}} #[[WGSizeHintAttr5:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel12(){{.*}} #[[WGSizeHintAttr7:[0-9]+]] Q.parallel_for(R2, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel13(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel13(){{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(R2, Ev, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel14(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel14(){{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(R2, {Ev}, Props2, [](sycl::id<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel15(){{.*}} #[[WGSizeHintAttr6:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel15(){{.*}} #[[WGSizeHintAttr8:[0-9]+]] Q.parallel_for(R3, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel16(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel16(){{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(R3, Ev, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel17(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel17(){{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(R3, {Ev}, Props3, [](sycl::id<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel18{{.*}}{{.*}} #[[WGSizeHintAttr7:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel18{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(R1, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel19{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel19{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(R1, Ev, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel20{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel20{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(R1, {Ev}, Props1, Redu1, [](sycl::id<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel21{{.*}}{{.*}} #[[WGSizeHintAttr8:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel21{{.*}}{{.*}} #[[WGSizeHintAttr7:[0-9]+]] Q.parallel_for(R2, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel22{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel22{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(R2, Ev, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel23{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel23{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(R2, {Ev}, Props2, Redu1, [](sycl::id<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel24{{.*}}{{.*}} #[[WGSizeHintAttr9:[0-9]+]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel24{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(R3, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel25{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel25{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(R3, Ev, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel26{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel26{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(R3, {Ev}, Props3, Redu1, [](sycl::id<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel27(){{.*}} #[[WGSizeHintAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel27(){{.*}} #[[WGSizeHintAttr10:[0-9]+]] Q.parallel_for(NDR1, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel28(){{.*}} #[[WGSizeHintAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel28(){{.*}} #[[WGSizeHintAttr10]] Q.parallel_for(NDR1, Ev, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel29(){{.*}} #[[WGSizeHintAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel29(){{.*}} #[[WGSizeHintAttr10]] Q.parallel_for(NDR1, {Ev}, Props1, [](sycl::nd_item<1>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel30(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel30(){{.*}} #[[WGSizeHintAttr11:[0-9]+]] Q.parallel_for(NDR2, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel31(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel31(){{.*}} #[[WGSizeHintAttr11]] Q.parallel_for(NDR2, Ev, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel32(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel32(){{.*}} #[[WGSizeHintAttr11]] Q.parallel_for(NDR2, {Ev}, Props2, [](sycl::nd_item<2>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel33(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel33(){{.*}} #[[WGSizeHintAttr12:[0-9]+]] Q.parallel_for(NDR3, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel34(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel34(){{.*}} #[[WGSizeHintAttr12]] Q.parallel_for(NDR3, Ev, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel35(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel35(){{.*}} #[[WGSizeHintAttr12]] Q.parallel_for(NDR3, {Ev}, Props3, [](sycl::nd_item<3>) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel36{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel36{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(NDR1, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel37{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel37{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(NDR1, Ev, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel38{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel38{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for(NDR1, {Ev}, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel39{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel39{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(NDR2, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel40{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel40{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(NDR2, Ev, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel41{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel41{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for(NDR2, {Ev}, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel42{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel42{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(NDR3, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel43{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel43{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(NDR3, Ev, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel44{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel44{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for(NDR3, {Ev}, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel45{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel45{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for( NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel46{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel46{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for( NDR1, Ev, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel47{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel47{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.parallel_for( NDR1, {Ev}, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel48{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel48{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for( NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel49{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel49{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for( NDR2, Ev, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel50{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel50{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.parallel_for( NDR2, {Ev}, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel51{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel51{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for( NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel52{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel52{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for( NDR3, Ev, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel53{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel53{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.parallel_for( NDR3, {Ev}, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel54(){{.*}} #[[WGSizeHintAttr1]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel54(){{.*}} #[[WGSizeHintAttr0]] Q.submit([&](sycl::handler &CGH) { CGH.single_task(Props1, []() {}); }); @@ -202,74 +202,74 @@ int main() { Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R1, Props1, [](sycl::id<1>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel58(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel58(){{.*}} #[[WGSizeHintAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R2, Props2, [](sycl::id<2>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel59(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel59(){{.*}} #[[WGSizeHintAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R3, Props3, [](sycl::id<3>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel60{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel60{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R1, Props1, Redu1, [](sycl::id<1>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel61{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel61{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R2, Props2, Redu1, [](sycl::id<2>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel62{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel62{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(R3, Props3, Redu1, [](sycl::id<3>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel63(){{.*}} #[[WGSizeHintAttr4]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel63(){{.*}} #[[WGSizeHintAttr10]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR1, Props1, [](sycl::nd_item<1>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel64(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel64(){{.*}} #[[WGSizeHintAttr11]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR2, Props2, [](sycl::nd_item<2>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel65(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel65(){{.*}} #[[WGSizeHintAttr12]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR3, Props3, [](sycl::nd_item<3>) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel66{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel66{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR1, Props1, Redu1, [](sycl::nd_item<1>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel67{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel67{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR2, Props2, Redu1, [](sycl::nd_item<2>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel68{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel68{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for(NDR3, Props3, Redu1, [](sycl::nd_item<3>, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel69{{.*}}{{.*}} #[[WGSizeHintAttr7]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel69{{.*}}{{.*}} #[[WGSizeHintAttr4]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel70{{.*}}{{.*}} #[[WGSizeHintAttr8]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel70{{.*}}{{.*}} #[[WGSizeHintAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {}); }); - // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel71{{.*}}{{.*}} #[[WGSizeHintAttr9]] + // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel71{{.*}}{{.*}} #[[WGSizeHintAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for( NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {}); @@ -282,14 +282,14 @@ int main() { G.parallel_for_work_item([&](sycl::h_item<1>) {}); }); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel73(){{.*}} #[[WGSizeHintAttr5]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel73(){{.*}} #[[WGSizeHintAttr7]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for_work_group( R2, Props2, [](sycl::group<2> G) { G.parallel_for_work_item([&](sycl::h_item<2>) {}); }); }); - // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel74(){{.*}} #[[WGSizeHintAttr6]] + // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel74(){{.*}} #[[WGSizeHintAttr8]] Q.submit([&](sycl::handler &CGH) { CGH.parallel_for_work_group( R3, Props3, [](sycl::group<3> G) { @@ -300,9 +300,12 @@ int main() { return 0; } -// CHECK-IR: attributes #[[WGSizeHintAttr1]] = { {{.*}}"sycl-work-group-size-hint"="1" +// CHECK-IR: attributes #[[WGSizeHintAttr0]] = { {{.*}}"sycl-work-group-size-hint"="1" // CHECK-IR: attributes #[[WGSizeHintAttr2]] = { {{.*}}"sycl-work-group-size-hint"="1,2" // CHECK-IR: attributes #[[WGSizeHintAttr3]] = { {{.*}}"sycl-work-group-size-hint"="1,2,3" // CHECK-IR: attributes #[[WGSizeHintAttr4]] = { {{.*}}"sycl-work-group-size-hint"="1" -// CHECK-IR: attributes #[[WGSizeHintAttr5]] = { {{.*}}"sycl-work-group-size-hint"="1,2" -// CHECK-IR: attributes #[[WGSizeHintAttr6]] = { {{.*}}"sycl-work-group-size-hint"="1,2,3" +// CHECK-IR: attributes #[[WGSizeHintAttr7]] = { {{.*}}"sycl-work-group-size-hint"="1,2" +// CHECK-IR: attributes #[[WGSizeHintAttr8]] = { {{.*}}"sycl-work-group-size-hint"="1,2,3" +// CHECK-IR: attributes #[[WGSizeHintAttr10]] = { {{.*}}"sycl-work-group-size-hint"="1" +// CHECK-IR: attributes #[[WGSizeHintAttr11]] = { {{.*}}"sycl-work-group-size-hint"="1,2" +// CHECK-IR: attributes #[[WGSizeHintAttr12]] = { {{.*}}"sycl-work-group-size-hint"="1,2,3" diff --git a/sycl/test/check_device_code/group_load.cpp b/sycl/test/check_device_code/group_load.cpp index 9b44eaef4ae2d..948a803963251 100644 --- a/sycl/test/check_device_code/group_load.cpp +++ b/sycl/test/check_device_code/group_load.cpp @@ -52,22 +52,22 @@ namespace blocked { // CHECK-GLOBAL-LABEL: @_ZN7blocked10test_naiveERN4sycl3_V19sub_groupEPU3AS1iRi( // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7:[0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META7:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8:[0-9]+]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked10test_naiveERN4sycl3_V19sub_groupEPU3AS3iRi( // CHECK-LOCAL-NEXT: entry: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6:[0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META7:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7:[0-9]+]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] -// CHECK-LOCAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] +// CHECK-LOCAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void // @@ -94,11 +94,11 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, plain_ptr p, int &out) { // CHECK-LOCAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META14:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IINS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_SP_RSQ_SS__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -132,11 +132,11 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META17:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IINS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_SN_RSO_SQ__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -162,16 +162,16 @@ using accessor_iter_t = local_accessor::iterator; // CHECK-GLOBAL-LABEL: @_ZN7blocked18test_accessor_iterERN4sycl3_V19sub_groupERNS1_6detail17accessor_iteratorIKiLi1EEERi( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_0_0_COPYLOAD:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA14:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_0_0_COPYLOAD:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11:![0-9]+]] // CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[ITER]], i64 8 -// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(4) [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX]], align 8, !tbaa [[TBAA17:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(4) [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX]], align 8, !tbaa [[TBAA14:![0-9]+]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr addrspace(4) [[AGG_TMP1_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP1_SROA_2_0_COPYLOAD]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META19:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[CONV3_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ADD_PTR_I_I_I_I_I:%.*]] = getelementptr i32, ptr addrspace(4) [[TMP0]], i64 [[CONV3_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(4) [[ADD_PTR_I_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(4) [[ADD_PTR_I_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // @@ -180,11 +180,11 @@ using accessor_iter_t = local_accessor::iterator; // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.15", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA20:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11:![0-9]+]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 3, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA23:![0-9]+]] +// CHECK-LOCAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA14:![0-9]+]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPiiLm1ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSA_INS3_14full_group_keyEJEEENSA_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESO_SM_NS0_4spanISN_XT2_EEESP_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr addrspace(4) noundef [[TMP0]], ptr noundef nonnull byval(%"class.sycl::_V1::span") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.15") align 1 [[AGG_TMP2_I]]) #[[ATTR6]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -208,7 +208,7 @@ SYCL_EXTERNAL void test_accessor_iter(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP2_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP3_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr noundef nonnull align 8 dereferenceable(80) [[AGG_TMP14]], ptr addrspace(4) noundef align 8 dereferenceable(80) [[ITER:%.*]], i64 80, i1 false) -// CHECK-GLOBAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP2_I]], align 8, !tbaa [[TBAA22:![0-9]+]] +// CHECK-GLOBAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP2_I]], align 8, !tbaa [[TBAA16:![0-9]+]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupENS0_6detail17accessor_iteratorIKiLi1EEEiLm1ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSD_INS3_21contiguous_memory_keyEJEEENSD_INS3_14full_group_keyEJEEENSD_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::detail::accessor_iterator") align 8 [[AGG_TMP14]], ptr noundef nonnull byval(%"class.sycl::_V1::span") align 8 [[AGG_TMP2_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.7") align 1 [[AGG_TMP3_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 80, ptr nonnull [[AGG_TMP14]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) @@ -221,11 +221,11 @@ SYCL_EXTERNAL void test_accessor_iter(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.7", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA23]] +// CHECK-LOCAL-NEXT: store ptr addrspace(4) [[OUT:%.*]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA14]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPiiLm1ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSA_INS3_21contiguous_memory_keyEJEEENSA_INS3_14full_group_keyEJEEENSA_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESQ_SO_NS0_4spanISP_XT2_EEESR_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr addrspace(4) noundef [[TMP0]], ptr noundef nonnull byval(%"class.sycl::_V1::span") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.7") align 1 [[AGG_TMP2_I]]) #[[ATTR6]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -249,11 +249,11 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-GLOBAL: if.then.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META30:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = load i8, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA33:![0-9]+]] -// CHECK-GLOBAL-NEXT: store i8 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 1, !tbaa [[TBAA33]] +// CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = load i8, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA18:![0-9]+]] +// CHECK-GLOBAL-NEXT: store i8 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 1, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1CCNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_SP_RSQ_SS__EXIT:%.*]] // CHECK-GLOBAL: if.end.i.i: @@ -273,11 +273,11 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META37:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i8, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA40:![0-9]+]] -// CHECK-LOCAL-NEXT: store i8 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 1, !tbaa [[TBAA40]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i8, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA16:![0-9]+]] +// CHECK-LOCAL-NEXT: store i8 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 1, !tbaa [[TBAA16]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3CCNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_SP_RSQ_SS__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -296,7 +296,7 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-GLOBAL-LABEL: @_ZN7blocked16test_four_shortsERN4sycl3_V19sub_groupEPU3AS1sNS1_4spanIsLm4EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA34:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA19:![0-9]+]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -313,16 +313,16 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS1SSLM4ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META36:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA39:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA21:![0-9]+]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA21]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP41:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP23:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS1ssLm4ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1SSLM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -335,7 +335,7 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // // CHECK-LOCAL-LABEL: @_ZN7blocked16test_four_shortsERN4sycl3_V19sub_groupEPU3AS3sNS1_4spanIsLm4EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA41:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA17:![0-9]+]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -352,16 +352,16 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS3SSLM4ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META43:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA46:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA19:![0-9]+]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA46]] +// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA19]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP48:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP21:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS3ssLm4ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3SSLM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -381,7 +381,7 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7blocked21test_non_power_of_twoERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm3EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -391,23 +391,23 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM3ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META43:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 3 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP46:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP25:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm3ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked21test_non_power_of_twoERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm3EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -417,16 +417,16 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM3ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META50:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 3 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP53:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP23:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm3ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -439,7 +439,7 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7blocked14test_four_intsERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm4EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -449,23 +449,23 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META47:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP50:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm4ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked14test_four_intsERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm4EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -475,16 +475,16 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META54:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP57:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP24:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm4ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -498,7 +498,7 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7blocked15test_seven_intsERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm7EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -508,23 +508,23 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM7ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META51:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 7 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP54:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm7ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked15test_seven_intsERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm7EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -534,16 +534,16 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM7ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META58:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 7 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP61:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP25:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm7ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -561,7 +561,7 @@ namespace striped { // CHECK-GLOBAL-LABEL: @_ZN7striped10test_naiveERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm2EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I:%.*]] @@ -571,24 +571,24 @@ namespace striped { // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I]], label [[FOR_BODY_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS9_9NAIVE_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESP_SN_NS0_4SPANISO_XT2_EEESQ__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META55:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META58:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I]], [[I_0_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I]], [[MUL_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[ADD_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP61:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP28:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm2ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS9_9naive_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_SN_NS0_4spanISO_XT2_EEESQ_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped10test_naiveERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm2EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I:%.*]] @@ -598,17 +598,17 @@ namespace striped { // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I]], label [[FOR_BODY_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS9_9NAIVE_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESP_SN_NS0_4SPANISO_XT2_EEESQ__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META62:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META65:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I]], [[I_0_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I]], [[MUL_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[ADD_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP68:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm2ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS9_9naive_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_SN_NS0_4spanISO_XT2_EEESQ_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -621,7 +621,7 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7striped14test_optimizedERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm2EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -631,7 +631,7 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, plain_ptr p, // // CHECK-LOCAL-LABEL: @_ZN7striped14test_optimizedERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm2EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -648,17 +648,17 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS3IILM2ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META69:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META72:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP75:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS3iiLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -693,12 +693,11 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META76:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META79:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IINS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_SN_RSO_SQ__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -723,10 +722,10 @@ using accessor_iter_t = local_accessor::iterator; // CHECK-GLOBAL-LABEL: @_ZN7striped18test_accessor_iterERN4sycl3_V19sub_groupERNS1_6detail17accessor_iteratorIKiLi1EEENS1_4spanIiLm2EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_0_0_COPYLOAD:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_0_0_COPYLOAD:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[ITER]], i64 8 -// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(4) [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX]], align 8, !tbaa [[TBAA17]] -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[AGG_TMP1_SROA_2_0_COPYLOAD:%.*]] = load i64, ptr addrspace(4) [[AGG_TMP1_SROA_2_0_ITER_SROA_IDX]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr addrspace(4) [[AGG_TMP1_SROA_0_0_COPYLOAD]], i64 [[AGG_TMP1_SROA_2_0_COPYLOAD]] @@ -737,17 +736,17 @@ using accessor_iter_t = local_accessor::iterator; // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPENS0_6DETAIL17ACCESSOR_ITERATORIKILI1EEEILM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSD_INS3_14FULL_GROUP_KEYEJEEENSD_INSB_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META62:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META65:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[CONV3_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ADD_PTR_I_I_I_I_I:%.*]] = getelementptr i32, ptr addrspace(4) [[TMP2]], i64 [[CONV3_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(4) [[ADD_PTR_I_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(4) [[ADD_PTR_I_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP68:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupENS0_6detail17accessor_iteratorIKiLi1EEEiLm2ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSD_INS3_14full_group_keyEJEEENSD_INSB_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void @@ -757,12 +756,12 @@ using accessor_iter_t = local_accessor::iterator; // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.30", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA20]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 3, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP1]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: store i64 [[TMP1]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPiiLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSA_INS3_14full_group_keyEJEEENSA_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESO_SM_NS0_4spanISN_XT2_EEESP_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr addrspace(4) noundef [[TMP0]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.30") align 1 [[AGG_TMP2_I]]) #[[ATTR6]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -781,13 +780,13 @@ SYCL_EXTERNAL void test_accessor_iter(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP3_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP15:%.*]] = alloca %"class.sycl::_V1::detail::accessor_iterator", align 8 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 80, ptr nonnull [[AGG_TMP15]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP2_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP3_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr noundef nonnull align 8 dereferenceable(80) [[AGG_TMP15]], ptr addrspace(4) noundef align 8 dereferenceable(80) [[ITER:%.*]], i64 80, i1 false) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP2_I]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP2_I]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupENS0_6detail17accessor_iteratorIKiLi1EEEiLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSD_INS3_21contiguous_memory_keyEJEEENSD_INS3_14full_group_keyEJEEENSD_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::detail::accessor_iterator") align 8 [[AGG_TMP15]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP2_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP3_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 80, ptr nonnull [[AGG_TMP15]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) @@ -800,12 +799,12 @@ SYCL_EXTERNAL void test_accessor_iter(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA20]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[ITER:%.*]], align 8, !tbaa [[TBAA11]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP1]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: store i64 [[TMP1]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPiiLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSA_INS3_21contiguous_memory_keyEJEEENSA_INS3_14full_group_keyEJEEENSA_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESQ_SO_NS0_4spanISP_XT2_EEESR_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr addrspace(4) noundef [[TMP0]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR6]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -821,7 +820,7 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-GLOBAL-LABEL: @_ZN7striped24test_runtime_align_checkERN4sycl3_V19sub_groupEPU3AS1cNS1_4spanIcLm2EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA87:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA36:![0-9]+]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -838,17 +837,17 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS1CCLM2ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META89:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META92:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA33]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i8 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 1, !tbaa [[TBAA33]] +// CHECK-GLOBAL-NEXT: store i8 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 1, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP95:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP38:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS1ccLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1CCLM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -861,7 +860,7 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // // CHECK-LOCAL-LABEL: @_ZN7striped24test_runtime_align_checkERN4sycl3_V19sub_groupEPU3AS3cNS1_4spanIcLm2EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA116:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA38:![0-9]+]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -878,17 +877,17 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS3CCLM2ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META118:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META121:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA40]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i8, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 1, !tbaa [[TBAA16]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i8 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 1, !tbaa [[TBAA40]] +// CHECK-LOCAL-NEXT: store i8 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 1, !tbaa [[TBAA16]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP124:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP40:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS3ccLm2ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3CCLM2ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -909,7 +908,7 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-GLOBAL-LABEL: @_ZN7striped16test_four_shortsERN4sycl3_V19sub_groupEPU3AS1sNS1_4spanIsLm4EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA34]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA19]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -926,17 +925,17 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS1SSLM4ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META96:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META99:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA21]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA21]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP102:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP39:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS1ssLm4ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1SSLM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -949,7 +948,7 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // // CHECK-LOCAL-LABEL: @_ZN7striped16test_four_shortsERN4sycl3_V19sub_groupEPU3AS3sNS1_4spanIsLm4EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA41]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA17]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -966,17 +965,17 @@ SYCL_EXTERNAL void test_runtime_align_check(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS3SSLM4ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META125:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META128:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA46]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA19]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA46]] +// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA19]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP131:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP41:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS3ssLm4ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3SSLM4ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -996,7 +995,7 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7striped19test_sixteen_shortsERN4sycl3_V19sub_groupEPU3AS1sNS1_4spanIsLm16EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA34]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA19]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -1013,17 +1012,17 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS1SSLM16ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META103:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META106:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA21]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA21]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP109:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP40:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS1ssLm16ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1SSLM16ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -1036,7 +1035,7 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // // CHECK-LOCAL-LABEL: @_ZN7striped19test_sixteen_shortsERN4sycl3_V19sub_groupEPU3AS3sNS1_4spanIsLm16EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA41]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA17]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -1053,17 +1052,17 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I19_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL6DETAIL15GROUP_LOAD_IMPLINS0_9SUB_GROUPEPU3AS3SSLM16ENS3_10PROPERTIESINS4_20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS4_9NAIVE_KEYEJEEENSB_INS4_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEEST_SR_NS0_4SPANISS_XT2_EEESU__EXIT_I_I:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META132:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META135:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA46]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA19]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA46]] +// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA19]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP138:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP42:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail15group_load_implINS0_9sub_groupEPU3AS3ssLm16ENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_9naive_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeEST_SR_NS0_4spanISS_XT2_EEESU_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3SSLM16ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] @@ -1081,7 +1080,7 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7striped21test_non_power_of_twoERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm3EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1091,24 +1090,24 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM3ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META110:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META113:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP116:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP41:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm3ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped21test_non_power_of_twoERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm3EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1118,17 +1117,17 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM3ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META139:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META142:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP145:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP43:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm3ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -1141,7 +1140,7 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7striped17test_sixteen_intsERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm16EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1151,24 +1150,24 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM16ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META117:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META120:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP123:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP42:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm16ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped17test_sixteen_intsERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm16EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1178,17 +1177,17 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM16ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META146:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META149:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP152:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP44:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm16ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void @@ -1202,7 +1201,7 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-LABEL: @_ZN7striped16test_eleven_intsERN4sycl3_V19sub_groupEPU3AS1iNS1_4spanIiLm11EEE( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA14]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1212,24 +1211,24 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS1IILM11ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META124:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META127:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP130:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP43:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS1iiLm11ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped16test_eleven_intsERN4sycl3_V19sub_groupEPU3AS3iNS1_4spanIiLm11EEE( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[OUT:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1239,17 +1238,17 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I_I]], label [[FOR_BODY_I_I_I]], label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IILM11ENS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI1EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESR_SP_NS0_4SPANISQ_XT2_EEESS__EXIT:%.*]] // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR6]], !noalias [[META153:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR6]], !noalias [[META156:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP159:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP45:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiLm11ENS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_SP_NS0_4spanISQ_XT2_EEESS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR6]] // CHECK-LOCAL-NEXT: ret void diff --git a/sycl/test/check_device_code/group_load_store_native_key.cpp b/sycl/test/check_device_code/group_load_store_native_key.cpp index 490d420a9d0f8..11a43f3d7cf28 100644 --- a/sycl/test/check_device_code/group_load_store_native_key.cpp +++ b/sycl/test/check_device_code/group_load_store_native_key.cpp @@ -34,7 +34,7 @@ using plain_ptr = typename sycl::detail::DecoratedType< // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) -// CHECK-GLOBAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS1Kj(ptr addrspace(1) noundef nonnull [[P]]) #[[ATTR3:[0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS1Kj(ptr addrspace(1) noundef nonnull [[P]]) #[[ATTR4:[0-9]+]] // CHECK-GLOBAL-NEXT: store i32 [[CALL6_I_I]], ptr addrspace(4) [[OUT:%.*]], align 4 // CHECK-GLOBAL-NEXT: ret void // @@ -42,13 +42,13 @@ using plain_ptr = typename sycl::detail::DecoratedType< // CHECK-LOCAL-NEXT: entry: // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3:[0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META7:![0-9]+]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4:[0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5:[0-9]+]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] -// CHECK-LOCAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] +// CHECK-LOCAL-NEXT: store i32 [[TMP0]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-LOCAL-NEXT: ret void // SYCL_EXTERNAL void test_load(sycl::sub_group &sg, plain_ptr p, int &out) { @@ -59,7 +59,7 @@ SYCL_EXTERNAL void test_load(sycl::sub_group &sg, plain_ptr p, int &out) { // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) -// CHECK-GLOBAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS1Kj(ptr addrspace(1) noundef nonnull [[P]]) #[[ATTR3]] +// CHECK-GLOBAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS1Kj(ptr addrspace(1) noundef nonnull [[P]]) #[[ATTR4]] // CHECK-GLOBAL-NEXT: store i32 [[CALL6_I_I]], ptr addrspace(4) [[OUT:%.*]], align 4 // CHECK-GLOBAL-NEXT: ret void // @@ -72,16 +72,16 @@ SYCL_EXTERNAL void test_load(sycl::sub_group &sg, plain_ptr p, int &out) { // CHECK-LOCAL-NEXT: [[CMP_I15_I_I:%.*]] = icmp eq i64 [[REM_I_I_I]], 0 // CHECK-LOCAL-NEXT: br i1 [[CMP_I15_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META14:![0-9]+]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-LOCAL-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: store i32 [[TMP1]], ptr addrspace(4) [[OUT:%.*]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IINS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_SP_RSQ_SS__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: -// CHECK-LOCAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS3Kj(ptr addrspace(3) noundef nonnull [[P]]) #[[ATTR3]] +// CHECK-LOCAL-NEXT: [[CALL6_I_I:%.*]] = tail call spir_func noundef i32 @_Z30__spirv_SubgroupBlockReadINTELIjET_PU3AS3Kj(ptr addrspace(3) noundef nonnull [[P]]) #[[ATTR4]] // CHECK-LOCAL-NEXT: store i32 [[CALL6_I_I]], ptr addrspace(4) [[OUT]], align 4 // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL10GROUP_LOADINS0_9SUB_GROUPEPU3AS3IINS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE17VERIFY_LOAD_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_SP_RSQ_SS__EXIT]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental10group_loadINS0_9sub_groupEPU3AS3iiNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE17verify_load_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT2_EEvE4typeESR_SP_RSQ_SS_.exit: @@ -92,7 +92,6 @@ SYCL_EXTERNAL void test_load_native(sycl::sub_group &sg, plain_ptr p, group_load(sg, p, out, opt_blocked_native{}); } -// // CHECK-GLOBAL-LABEL: @_Z10test_storeRN4sycl3_V19sub_groupEiPU3AS1i( // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null @@ -102,15 +101,15 @@ SYCL_EXTERNAL void test_load_native(sycl::sub_group &sg, plain_ptr p, // CHECK-GLOBAL-NEXT: [[CMP_I25_I_I:%.*]] = icmp eq i64 [[REM_I_I_I]], 0 // CHECK-GLOBAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-GLOBAL: if.then.i.i: -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META7:![0-9]+]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5:[0-9]+]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_RKSN_SO_SQ__EXIT:%.*]] // CHECK-GLOBAL: if.end.i.i: -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(ptr addrspace(1) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR3]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(ptr addrspace(1) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR4]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_RKSN_SO_SQ__EXIT]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT2_EEvE4typeESP_RKSN_SO_SQ_.exit: // CHECK-GLOBAL-NEXT: ret void @@ -119,12 +118,12 @@ SYCL_EXTERNAL void test_load_native(sycl::sub_group &sg, plain_ptr p, // CHECK-LOCAL-NEXT: entry: // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META17:![0-9]+]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-LOCAL-NEXT: ret void // SYCL_EXTERNAL void test_store(sycl::sub_group &sg, int v, plain_ptr p) { @@ -140,15 +139,15 @@ SYCL_EXTERNAL void test_store(sycl::sub_group &sg, int v, plain_ptr p) { // CHECK-GLOBAL-NEXT: [[CMP_I25_I_I:%.*]] = icmp eq i64 [[REM_I_I_I]], 0 // CHECK-GLOBAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-GLOBAL: if.then.i.i: -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META14:![0-9]+]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT:%.*]] // CHECK-GLOBAL: if.end.i.i: -// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(ptr addrspace(1) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR3]] +// CHECK-GLOBAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1jj(ptr addrspace(1) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR4]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT2_EEvE4typeESR_RKSP_SQ_SS_.exit: // CHECK-GLOBAL-NEXT: ret void @@ -162,15 +161,15 @@ SYCL_EXTERNAL void test_store(sycl::sub_group &sg, int v, plain_ptr p) { // CHECK-LOCAL-NEXT: [[CMP_I25_I_I:%.*]] = icmp eq i64 [[REM_I_I_I]], 0 // CHECK-LOCAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR3]], !noalias [[META20:![0-9]+]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR5]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR3]] +// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR4]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS3INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: -// CHECK-LOCAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS3jj(ptr addrspace(3) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR3]] +// CHECK-LOCAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS3jj(ptr addrspace(3) noundef nonnull [[P]], i32 noundef [[V]]) #[[ATTR4]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS3INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T1_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT2_EEvE4typeESR_RKSP_SQ_SS_.exit: // CHECK-LOCAL-NEXT: ret void diff --git a/sycl/test/check_device_code/group_store.cpp b/sycl/test/check_device_code/group_store.cpp index 9fc99569eb54c..4dc20f7f66056 100644 --- a/sycl/test/check_device_code/group_store.cpp +++ b/sycl/test/check_device_code/group_store.cpp @@ -53,20 +53,20 @@ namespace blocked { // CHECK-GLOBAL-LABEL: @_ZN7blocked10test_naiveERN4sycl3_V19sub_groupEiPU3AS1i( // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7:[0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META7:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8:[0-9]+]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] +// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked10test_naiveERN4sycl3_V19sub_groupEiPU3AS3i( // CHECK-LOCAL-NEXT: entry: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7:[0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META7:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8:[0-9]+]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10:![0-9]+]] +// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7:![0-9]+]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void // @@ -85,10 +85,10 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, int v, plain_ptr p) { // CHECK-GLOBAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-GLOBAL: if.then.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META14:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT:%.*]] // CHECK-GLOBAL: if.end.i.i: @@ -107,10 +107,10 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, int v, plain_ptr p) { // CHECK-LOCAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META14:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS3INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESR_RKSP_SQ_SS__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -135,10 +135,10 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, int v, // CHECK-GLOBAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-GLOBAL: if.then.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META17:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[V:%.*]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS1INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_RKSN_SO_SQ__EXIT:%.*]] // CHECK-GLOBAL: if.end.i.i: @@ -157,10 +157,10 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, int v, // CHECK-LOCAL-NEXT: br i1 [[CMP_I25_I_I]], label [[IF_END_I_I:%.*]], label [[IF_THEN_I_I:%.*]] // CHECK-LOCAL: if.then.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META17:![0-9]+]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[CALL_I_I_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[V:%.*]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEIPU3AS3INS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSB_INS3_14FULL_GROUP_KEYEJEEENSB_INS9_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T1_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT2_EEVE4TYPEESP_RKSN_SO_SQ__EXIT:%.*]] // CHECK-LOCAL: if.end.i.i: @@ -181,29 +181,29 @@ using accessor_iter_t = accessor v, // CHECK-GLOBAL-LABEL: @_ZN7blocked22test_four_const_shortsERN4sycl3_V19sub_groupENS1_4spanIKsLm4EEEPU3AS1s( // CHECK-GLOBAL-NEXT: entry: // CHECK-GLOBAL-NEXT: [[VALUES_I_I:%.*]] = alloca [4 x i16], align 2 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(1) [[P:%.*]], null // CHECK-GLOBAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -404,15 +404,15 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA41]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META50:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(1) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-GLOBAL-NEXT: store i16 [[TMP3]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP53:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEKsLm4EPU3AS1sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INS4_9naive_keyEJEEENSC_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESU_NS0_4spanISS_XT1_EEEST_SV_.exit.i.i: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEKSLM4EPU3AS1SNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSC_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSC_INS3_14FULL_GROUP_KEYEJEEENSC_INSA_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T2_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESS_NS0_4SPANISQ_XT1_EEESR_ST__EXIT:%.*]] @@ -424,25 +424,25 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-GLOBAL-NEXT: [[CMP_I_I:%.*]] = icmp samesign ult i32 [[I_0_I_I]], 4 // CHECK-GLOBAL-NEXT: br i1 [[CMP_I_I]], label [[FOR_BODY_I_I]], label [[FOR_COND_CLEANUP_I_I:%.*]] // CHECK-GLOBAL: for.cond.cleanup.i.i: -// CHECK-GLOBAL-NEXT: [[TMP4:%.*]] = load i64, ptr [[VALUES_I_I]], align 2, !tbaa [[TBAA48]] +// CHECK-GLOBAL-NEXT: [[TMP4:%.*]] = load i64, ptr [[VALUES_I_I]], align 2, !tbaa [[TBAA24]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS1mm(ptr addrspace(1) noundef nonnull [[P]], i64 noundef [[TMP4]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[VALUES_I_I]]) #[[ATTR9]] // CHECK-GLOBAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEKSLM4EPU3AS1SNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSC_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSC_INS3_14FULL_GROUP_KEYEJEEENSC_INSA_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T2_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESS_NS0_4SPANISQ_XT1_EEESR_ST__EXIT]] // CHECK-GLOBAL: for.body.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I30_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP5:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I30_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-GLOBAL-NEXT: [[TMP5:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I30_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds [4 x i16], ptr [[VALUES_I_I]], i64 0, i64 [[CONV_I_I]] -// CHECK-GLOBAL-NEXT: store i16 [[TMP5]], ptr [[ARRAYIDX_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-GLOBAL-NEXT: store i16 [[TMP5]], ptr [[ARRAYIDX_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-GLOBAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP54:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEKsLm4EPU3AS1sNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INSA_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESS_NS0_4spanISQ_XT1_EEESR_ST_.exit: // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked22test_four_const_shortsERN4sycl3_V19sub_groupENS1_4spanIKsLm4EEEPU3AS3s( // CHECK-LOCAL-NEXT: entry: // CHECK-LOCAL-NEXT: [[VALUES_I_I:%.*]] = alloca [4 x i16], align 2 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: [[CMP_I_I_I:%.*]] = icmp ne ptr addrspace(3) [[P:%.*]], null // CHECK-LOCAL-NEXT: tail call void @llvm.assume(i1 [[CMP_I_I_I]]) @@ -460,15 +460,15 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA41]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META50:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP3:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 2, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i16, ptr addrspace(3) [[P]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-LOCAL-NEXT: store i16 [[TMP3]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP53:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEKsLm4EPU3AS3sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INS4_9naive_keyEJEEENSC_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESU_NS0_4spanISS_XT1_EEEST_SV_.exit.i.i: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEKSLM4EPU3AS3SNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSC_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSC_INS3_14FULL_GROUP_KEYEJEEENSC_INSA_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T2_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESS_NS0_4SPANISQ_XT1_EEESR_ST__EXIT:%.*]] @@ -480,18 +480,18 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-LOCAL-NEXT: [[CMP_I_I:%.*]] = icmp samesign ult i32 [[I_0_I_I]], 4 // CHECK-LOCAL-NEXT: br i1 [[CMP_I_I]], label [[FOR_BODY_I_I]], label [[FOR_COND_CLEANUP_I_I:%.*]] // CHECK-LOCAL: for.cond.cleanup.i.i: -// CHECK-LOCAL-NEXT: [[TMP4:%.*]] = load i64, ptr [[VALUES_I_I]], align 2, !tbaa [[TBAA48]] +// CHECK-LOCAL-NEXT: [[TMP4:%.*]] = load i64, ptr [[VALUES_I_I]], align 2, !tbaa [[TBAA24]] // CHECK-LOCAL-NEXT: tail call spir_func void @_Z31__spirv_SubgroupBlockWriteINTELPU3AS3mm(ptr addrspace(3) noundef nonnull [[P]], i64 noundef [[TMP4]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[VALUES_I_I]]) #[[ATTR9]] // CHECK-LOCAL-NEXT: br label [[_ZN4SYCL3_V13EXT6ONEAPI12EXPERIMENTAL11GROUP_STOREINS0_9SUB_GROUPEKSLM4EPU3AS3SNS3_10PROPERTIESINS3_6DETAIL20PROPERTIES_TYPE_LISTIJNS3_14PROPERTY_VALUEINS3_18DATA_PLACEMENT_KEYEJST17INTEGRAL_CONSTANTIILI0EEEEENSC_INS3_21CONTIGUOUS_MEMORY_KEYEJEEENSC_INS3_14FULL_GROUP_KEYEJEEENSC_INSA_25NATIVE_LOCAL_BLOCK_IO_KEYEJEEEEEEEEEENST9ENABLE_IFIXAAAASR6DETAILE18VERIFY_STORE_TYPESIT0_T2_ESR6DETAILE18IS_GENERIC_GROUP_VIT_E18IS_PROPERTY_LIST_VIT3_EEVE4TYPEESS_NS0_4SPANISQ_XT1_EEESR_ST__EXIT]] // CHECK-LOCAL: for.body.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I30_I_I:%.*]] = getelementptr inbounds nuw i16, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-LOCAL-NEXT: [[TMP5:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I30_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-LOCAL-NEXT: [[TMP5:%.*]] = load i16, ptr addrspace(4) [[ARRAYIDX_I30_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds [4 x i16], ptr [[VALUES_I_I]], i64 0, i64 [[CONV_I_I]] -// CHECK-LOCAL-NEXT: store i16 [[TMP5]], ptr [[ARRAYIDX_I_I]], align 2, !tbaa [[TBAA41]] +// CHECK-LOCAL-NEXT: store i16 [[TMP5]], ptr [[ARRAYIDX_I_I]], align 2, !tbaa [[TBAA20]] // CHECK-LOCAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP54:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEKsLm4EPU3AS3sNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INSA_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESS_NS0_4spanISQ_XT1_EEESR_ST_.exit: // CHECK-LOCAL-NEXT: ret void // @@ -504,7 +504,7 @@ SYCL_EXTERNAL void test_four_const_shorts(sycl::sub_group &sg, // CHECK-GLOBAL-LABEL: @_ZN7blocked21test_non_power_of_twoERN4sycl3_V19sub_groupENS1_4spanIiLm3EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -515,22 +515,22 @@ SYCL_EXTERNAL void test_four_const_shorts(sycl::sub_group &sg, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META55:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 3 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP58:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP28:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm3EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked21test_non_power_of_twoERN4sycl3_V19sub_groupENS1_4spanIiLm3EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -541,15 +541,15 @@ SYCL_EXTERNAL void test_four_const_shorts(sycl::sub_group &sg, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META55:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 3 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP58:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP28:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm3EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -562,7 +562,7 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-GLOBAL-LABEL: @_ZN7blocked14test_four_intsERN4sycl3_V19sub_groupENS1_4spanIiLm4EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -573,22 +573,22 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META59:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP62:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm4EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked14test_four_intsERN4sycl3_V19sub_groupENS1_4spanIiLm4EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -599,15 +599,15 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META59:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = shl i32 [[CALL_I_I_I_I_I_I]], 2 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = or disjoint i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP62:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm4EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -621,7 +621,7 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, span v, // CHECK-GLOBAL-LABEL: @_ZN7blocked15test_seven_intsERN4sycl3_V19sub_groupENS1_4spanIiLm7EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -632,22 +632,22 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META63:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 7 // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP66:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP30:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm7EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7blocked15test_seven_intsERN4sycl3_V19sub_groupENS1_4spanIiLm7EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -658,15 +658,15 @@ SYCL_EXTERNAL void test_four_ints(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META63:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I_I_I_I_I]], 7 // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[MUL_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP66:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP30:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm7EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi0EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -681,7 +681,7 @@ SYCL_EXTERNAL void test_seven_ints(sycl::sub_group &sg, span v, namespace striped { // CHECK-GLOBAL-LABEL: @_ZN7striped10test_naiveERN4sycl3_V19sub_groupENS1_4spanIiLm2EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I:%.*]] @@ -692,23 +692,23 @@ namespace striped { // CHECK-GLOBAL: for.body.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META67:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META70:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I]], [[I_0_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I]], [[MUL_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[ADD_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP73:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP31:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm2EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS9_9naive_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_NS0_4spanISN_XT1_EEESO_SQ_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped10test_naiveERN4sycl3_V19sub_groupENS1_4spanIiLm2EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I:%.*]] @@ -719,16 +719,16 @@ namespace striped { // CHECK-LOCAL: for.body.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I:%.*]] = zext nneg i32 [[I_0_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META67:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META70:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I:%.*]] = mul nuw nsw i32 [[CALL_I_I2_I_I_I]], [[I_0_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I]], [[MUL_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I:%.*]] = sext i32 [[ADD_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I]] = add nuw nsw i32 [[I_0_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP73:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I]], !llvm.loop [[LOOP31:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm2EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS9_9naive_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_NS0_4spanISN_XT1_EEESO_SQ_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -744,11 +744,11 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, span v, // CHECK-GLOBAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2EPU3AS1iNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr addrspace(1) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -760,11 +760,11 @@ SYCL_EXTERNAL void test_naive(sycl::sub_group &sg, span v, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2EPU3AS3iNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr addrspace(3) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -782,11 +782,11 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, span v, // CHECK-GLOBAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.30", align 1 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 3, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2EPU3AS1iNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_NS0_4spanISN_XT1_EEESO_SQ_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr addrspace(1) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.30") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -798,11 +798,11 @@ SYCL_EXTERNAL void test_optimized(sycl::sub_group &sg, span v, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.30", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 3, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2EPU3AS3iNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESP_NS0_4spanISN_XT1_EEESO_SQ_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr addrspace(3) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.30") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -822,10 +822,10 @@ using accessor_iter_t = accessor v, // CHECK-GLOBAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP3_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP26:%.*]] = alloca %"class.sycl::_V1::detail::accessor_iterator", align 8 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 80, ptr nonnull [[AGG_TMP26]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP3_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr noundef nonnull align 8 dereferenceable(80) [[AGG_TMP26]], ptr addrspace(4) noundef align 8 dereferenceable(80) [[ITER:%.*]], i64 80, i1 false) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2ENS0_6detail17accessor_iteratorIiLi1EEENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESS_NS0_4spanISQ_XT1_EEESR_ST_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::detail::accessor_iterator") align 8 [[AGG_TMP26]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP3_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 80, ptr nonnull [[AGG_TMP26]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) @@ -914,13 +914,13 @@ SYCL_EXTERNAL void test_accessor_iter(sycl::sub_group &sg, span v, // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.22", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP3_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP26:%.*]] = alloca %"class.sycl::_V1::detail::accessor_iterator", align 8 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 80, ptr nonnull [[AGG_TMP26]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP3_I]]) // CHECK-LOCAL-NEXT: call void @llvm.memcpy.p0.p4.i64(ptr noundef nonnull align 8 dereferenceable(80) [[AGG_TMP26]], ptr addrspace(4) noundef align 8 dereferenceable(80) [[ITER:%.*]], i64 80, i1 false) -// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEiLm2ENS0_6detail17accessor_iteratorIiLi1EEENS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSC_INS3_21contiguous_memory_keyEJEEENSC_INS3_14full_group_keyEJEEENSC_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESS_NS0_4spanISQ_XT1_EEESR_ST_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.22") align 8 [[AGG_TMP1_I]], ptr noundef nonnull byval(%"class.sycl::_V1::detail::accessor_iterator") align 8 [[AGG_TMP26]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP3_I]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 80, ptr nonnull [[AGG_TMP26]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) @@ -940,11 +940,11 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-GLOBAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.17", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEsLm4EPU3AS1sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.17") align 8 [[AGG_TMP1_I]], ptr addrspace(1) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -956,11 +956,11 @@ SYCL_EXTERNAL void test_accessor_iter_force_optimized(sycl::sub_group &sg, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.17", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA39]] +// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA18]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEsLm4EPU3AS3sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.17") align 8 [[AGG_TMP1_I]], ptr addrspace(3) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -979,11 +979,11 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-GLOBAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-GLOBAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.32", align 8 // CHECK-GLOBAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA39]] +// CHECK-GLOBAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA18]] // CHECK-GLOBAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEsLm16EPU3AS1sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.32") align 8 [[AGG_TMP1_I]], ptr addrspace(1) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-GLOBAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -995,11 +995,11 @@ SYCL_EXTERNAL void test_four_shorts(sycl::sub_group &sg, span v, // CHECK-LOCAL-NEXT: [[AGG_TMP_I:%.*]] = alloca %"struct.sycl::_V1::sub_group", align 1 // CHECK-LOCAL-NEXT: [[AGG_TMP1_I:%.*]] = alloca %"class.sycl::_V1::span.32", align 8 // CHECK-LOCAL-NEXT: [[AGG_TMP2_I:%.*]] = alloca %"class.sycl::_V1::ext::oneapi::experimental::properties.28", align 1 -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA39]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA18]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[AGG_TMP2_I]]) -// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA39]] +// CHECK-LOCAL-NEXT: store i64 [[TMP0]], ptr [[AGG_TMP1_I]], align 8, !tbaa [[TBAA18]] // CHECK-LOCAL-NEXT: tail call spir_func void @_ZN4sycl3_V13ext6oneapi12experimental6detail16group_store_implINS0_9sub_groupEsLm16EPU3AS3sNS3_10propertiesINS4_20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS4_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_(ptr noundef nonnull byval(%"struct.sycl::_V1::sub_group") align 1 [[AGG_TMP_I]], ptr noundef nonnull byval(%"class.sycl::_V1::span.32") align 8 [[AGG_TMP1_I]], ptr addrspace(3) noundef [[P:%.*]], ptr noundef nonnull byval(%"class.sycl::_V1::ext::oneapi::experimental::properties.28") align 1 [[AGG_TMP2_I]]) #[[ATTR7]] // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 1, ptr nonnull [[AGG_TMP_I]]) // CHECK-LOCAL-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr nonnull [[AGG_TMP1_I]]) @@ -1013,7 +1013,7 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, span v, // CHECK-GLOBAL-LABEL: @_ZN7striped21test_non_power_of_twoERN4sycl3_V19sub_groupENS1_4spanIiLm3EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1024,23 +1024,23 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META142:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META145:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP148:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP52:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm3EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped21test_non_power_of_twoERN4sycl3_V19sub_groupENS1_4spanIiLm3EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1051,16 +1051,16 @@ SYCL_EXTERNAL void test_sixteen_shorts(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META142:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META145:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP148:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP52:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm3EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -1073,7 +1073,7 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-GLOBAL-LABEL: @_ZN7striped17test_sixteen_intsERN4sycl3_V19sub_groupENS1_4spanIiLm16EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1084,23 +1084,23 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META149:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META152:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP155:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP53:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm16EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped17test_sixteen_intsERN4sycl3_V19sub_groupENS1_4spanIiLm16EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1111,16 +1111,16 @@ SYCL_EXTERNAL void test_non_power_of_two(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META149:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META152:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP155:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP53:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm16EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void @@ -1134,7 +1134,7 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, span v, // CHECK-GLOBAL-LABEL: @_ZN7striped16test_eleven_intsERN4sycl3_V19sub_groupENS1_4spanIiLm11EEEPU3AS1i( // CHECK-GLOBAL-NEXT: entry: -// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-GLOBAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-GLOBAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1145,23 +1145,23 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, span v, // CHECK-GLOBAL: for.body.i.i.i: // CHECK-GLOBAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META156:![0-9]+]] -// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META159:![0-9]+]] +// CHECK-GLOBAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-GLOBAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-GLOBAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-GLOBAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-GLOBAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-GLOBAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-GLOBAL-NEXT: store i32 [[TMP2]], ptr addrspace(1) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-GLOBAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP162:![0-9]+]] +// CHECK-GLOBAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP54:![0-9]+]] // CHECK-GLOBAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm11EPU3AS1iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-GLOBAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-GLOBAL-NEXT: ret void // // CHECK-LOCAL-LABEL: @_ZN7striped16test_eleven_intsERN4sycl3_V19sub_groupENS1_4spanIiLm11EEEPU3AS3i( // CHECK-LOCAL-NEXT: entry: -// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA20]] +// CHECK-LOCAL-NEXT: [[TMP0:%.*]] = load i64, ptr [[V:%.*]], align 8, !tbaa [[TBAA11]] // CHECK-LOCAL-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(4) // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I:%.*]] @@ -1172,16 +1172,16 @@ SYCL_EXTERNAL void test_sixteen_ints(sycl::sub_group &sg, span v, // CHECK-LOCAL: for.body.i.i.i: // CHECK-LOCAL-NEXT: [[CONV_I_I_I:%.*]] = zext nneg i32 [[I_0_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I_I:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(4) [[TMP1]], i64 [[CONV_I_I_I]] -// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA10]] -// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR7]], !noalias [[META156:![0-9]+]] -// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR7]], !noalias [[META159:![0-9]+]] +// CHECK-LOCAL-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(4) [[ARRAYIDX_I_I_I_I]], align 4, !tbaa [[TBAA7]] +// CHECK-LOCAL-NEXT: [[CALL_I_I_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() #[[ATTR8]] +// CHECK-LOCAL-NEXT: [[CALL_I_I2_I_I_I_I:%.*]] = tail call spir_func noundef i32 @_Z27__spirv_BuiltInSubgroupSizev() #[[ATTR8]] // CHECK-LOCAL-NEXT: [[MUL_I_I_I_I:%.*]] = mul i32 [[CALL_I_I2_I_I_I_I]], [[I_0_I_I_I]] // CHECK-LOCAL-NEXT: [[ADD_I_I_I_I:%.*]] = add i32 [[CALL_I_I_I_I_I_I]], [[MUL_I_I_I_I]] // CHECK-LOCAL-NEXT: [[IDXPROM_I_I_I:%.*]] = sext i32 [[ADD_I_I_I_I]] to i64 // CHECK-LOCAL-NEXT: [[ARRAYIDX_I_I_I:%.*]] = getelementptr inbounds i32, ptr addrspace(3) [[P:%.*]], i64 [[IDXPROM_I_I_I]] -// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA10]] +// CHECK-LOCAL-NEXT: store i32 [[TMP2]], ptr addrspace(3) [[ARRAYIDX_I_I_I]], align 4, !tbaa [[TBAA7]] // CHECK-LOCAL-NEXT: [[INC_I_I_I]] = add nuw nsw i32 [[I_0_I_I_I]], 1 -// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP162:![0-9]+]] +// CHECK-LOCAL-NEXT: br label [[FOR_COND_I_I_I]], !llvm.loop [[LOOP54:![0-9]+]] // CHECK-LOCAL: _ZN4sycl3_V13ext6oneapi12experimental11group_storeINS0_9sub_groupEiLm11EPU3AS3iNS3_10propertiesINS3_6detail20properties_type_listIJNS3_14property_valueINS3_18data_placement_keyEJSt17integral_constantIiLi1EEEEENSB_INS3_21contiguous_memory_keyEJEEENSB_INS3_14full_group_keyEJEEENSB_INS9_25native_local_block_io_keyEJEEEEEEEEEENSt9enable_ifIXaaaasr6detailE18verify_store_typesIT0_T2_Esr6detailE18is_generic_group_vIT_E18is_property_list_vIT3_EEvE4typeESR_NS0_4spanISP_XT1_EEESQ_SS_.exit: // CHECK-LOCAL-NEXT: tail call spir_func void @_Z22__spirv_ControlBarrieriii(i32 noundef 3, i32 noundef 3, i32 noundef 912) #[[ATTR7]] // CHECK-LOCAL-NEXT: ret void diff --git a/sycl/test/check_device_code/spirv_workitem_func_attr.cpp b/sycl/test/check_device_code/spirv_workitem_func_attr.cpp new file mode 100644 index 0000000000000..ae646d46f0c58 --- /dev/null +++ b/sycl/test/check_device_code/spirv_workitem_func_attr.cpp @@ -0,0 +1,65 @@ +// RUN: %clangxx -fsycl-device-only -S -emit-llvm -o - %s | FileCheck %s + +#include + +SYCL_EXTERNAL size_t GlobalInvocationId(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z33__spirv_BuiltInGlobalInvocationIdi({{.*}} [[ATTR:#[0-9]+]] + return __spirv_BuiltInGlobalInvocationId(dim); +} + +SYCL_EXTERNAL size_t GlobalSize(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z25__spirv_BuiltInGlobalSizei({{.*}} [[ATTR]] + return __spirv_BuiltInGlobalSize(dim); +} + +SYCL_EXTERNAL size_t GlobalOffset(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z27__spirv_BuiltInGlobalOffseti({{.*}} [[ATTR]] + return __spirv_BuiltInGlobalOffset(dim); +} + +SYCL_EXTERNAL size_t NumWorkgroups(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z28__spirv_BuiltInNumWorkgroupsi({{.*}} [[ATTR]] + return __spirv_BuiltInNumWorkgroups(dim); +} + +SYCL_EXTERNAL size_t WorkgroupSize(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z28__spirv_BuiltInWorkgroupSizei({{.*}} [[ATTR]] + return __spirv_BuiltInWorkgroupSize(dim); +} + +SYCL_EXTERNAL size_t WorkgroupId(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z26__spirv_BuiltInWorkgroupIdi({{.*}} [[ATTR]] + return __spirv_BuiltInWorkgroupId(dim); +} + +SYCL_EXTERNAL size_t LocalInvocationId(int dim) { + // CHECK: call spir_func {{.*}} i64 @_Z32__spirv_BuiltInLocalInvocationIdi({{.*}} [[ATTR]] + return __spirv_BuiltInLocalInvocationId(dim); +} + +SYCL_EXTERNAL uint32_t SubgroupSize() { + // CHECK: call spir_func {{.*}} i32 @_Z27__spirv_BuiltInSubgroupSizev() [[ATTR]] + return __spirv_BuiltInSubgroupSize(); +} + +SYCL_EXTERNAL uint32_t SubgroupMaxSize() { + // CHECK: call spir_func {{.*}} i32 @_Z30__spirv_BuiltInSubgroupMaxSizev() [[ATTR]] + return __spirv_BuiltInSubgroupMaxSize(); +} + +SYCL_EXTERNAL uint32_t NumSubgroups() { + // CHECK: call spir_func {{.*}} i32 @_Z27__spirv_BuiltInNumSubgroupsv() [[ATTR]] + return __spirv_BuiltInNumSubgroups(); +} + +SYCL_EXTERNAL uint32_t SubgroupId() { + // CHECK: call spir_func {{.*}} i32 @_Z25__spirv_BuiltInSubgroupIdv() [[ATTR]] + return __spirv_BuiltInSubgroupId(); +} + +SYCL_EXTERNAL uint32_t SubgroupLocalInvocationId() { + // CHECK: call spir_func {{.*}} i32 @_Z40__spirv_BuiltInSubgroupLocalInvocationIdv() [[ATTR]] + return __spirv_BuiltInSubgroupLocalInvocationId(); +} + +// CHECK: attributes [[ATTR]] = {{.*}} memory(none)