Hello Sir
When i am trying to compile the source files present in the "v7-415t_0.5ms" directory, I am getting the following error:
ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_0.v" Line 65: Instantiating <u1> from unknown module <im_in> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_conv_1_1.v" Line 302: Instantiating <m1> from unknown module <mult_16> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_1.v" Line 170: Instantiating <u1> from unknown module <clk_div> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_2.v" Line 198: Instantiating <u2> from unknown module <bias_mult3> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/k2_out.v" Line 70: Instantiating <u1> from unknown module <k_ind_mult> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_3.v" Line 183: Instantiating <u2> from unknown module <bias_mult4> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_4.v" Line 146: Instantiating <u1> from unknown module <m_max_4_ram> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/k3_out.v" Line 73: Instantiating <u1> from unknown module <k_ind_mult2> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_5.v" Line 97: Instantiating <u1> from unknown module <m_conv_5_ram> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_fc.v" Line 96: Instantiating <u1> from unknown module <k_ind_mult3>
Can you please tell me if these modules are missing from the source or they are IPs.If they are IPs , please tell me the mames of those.
Thanks
Hello Sir
When i am trying to compile the source files present in the "v7-415t_0.5ms" directory, I am getting the following error:
ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_0.v" Line 65: Instantiating <u1> from unknown module <im_in> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_conv_1_1.v" Line 302: Instantiating <m1> from unknown module <mult_16> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_1.v" Line 170: Instantiating <u1> from unknown module <clk_div> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_2.v" Line 198: Instantiating <u2> from unknown module <bias_mult3> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/k2_out.v" Line 70: Instantiating <u1> from unknown module <k_ind_mult> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_3.v" Line 183: Instantiating <u2> from unknown module <bias_mult4> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_4.v" Line 146: Instantiating <u1> from unknown module <m_max_4_ram> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/k3_out.v" Line 73: Instantiating <u1> from unknown module <k_ind_mult2> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_layer_input_5.v" Line 97: Instantiating <u1> from unknown module <m_conv_5_ram> ERROR:HDLCompiler:1654 - "C:/Users/TEJAS/Documents/convolution_network_on_FPGA-master/v7-485t_0.3ms/m_fc.v" Line 96: Instantiating <u1> from unknown module <k_ind_mult3>Can you please tell me if these modules are missing from the source or they are IPs.If they are IPs , please tell me the mames of those.
Thanks