@@ -81,7 +81,6 @@ struct i2s_key_slot_s {
8181
8282static void * s_i2s_tx_mutex [SOC_I2S_NUM ];
8383static void * s_i2s_rx_mutex [SOC_I2S_NUM ];
84-
8584static struct i2s_key_slot_s i2s_key_slot [SOC_I2S_NUM ];
8685
8786#define i2s_safe_lock_create (lock ) do { \
@@ -315,20 +314,26 @@ static esp_err_t _i2s_set_clk(i2s_stream_t *i2s, int rate, int bits, int ch)
315314 return ESP_FAIL ;
316315 }
317316 if (i2s -> config .transmit_mode == I2S_COMM_MODE_STD ) {
318- if (i2s_key_slot [port ].tx_handle != NULL && i2s -> type == AUDIO_STREAM_WRITER ) {
317+ if (i2s_key_slot [port ].tx_handle != NULL ) {
319318 i2s_key_slot [port ].tx_std_cfg .slot_cfg .data_bit_width = bits ;
320319 i2s_key_slot [port ].tx_std_cfg .slot_cfg .ws_width = bits ;
321320 i2s_key_slot [port ].tx_std_cfg .slot_cfg .slot_mode = slot_mode ;
321+ i2s_key_slot [port ].tx_std_cfg .slot_cfg .slot_mask = (slot_mode == I2S_SLOT_MODE_MONO ) ? I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH ;
322322 i2s_key_slot [port ].tx_std_cfg .clk_cfg .sample_rate_hz = rate ;
323323 i2s_channel_disable (i2s_key_slot [port ].tx_handle );
324324 err |= i2s_channel_reconfig_std_slot (i2s_key_slot [port ].tx_handle , & i2s_key_slot [port ].tx_std_cfg .slot_cfg );
325325 err |= i2s_channel_reconfig_std_clock (i2s_key_slot [port ].tx_handle , & i2s_key_slot [port ].tx_std_cfg .clk_cfg );
326326 err |= i2s_channel_enable (i2s_key_slot [port ].tx_handle );
327327 }
328- if (i2s_key_slot [port ].rx_handle != NULL && i2s -> type == AUDIO_STREAM_READER ) {
328+ if (i2s_key_slot [port ].rx_handle != NULL ) {
329329 i2s_key_slot [i2s -> port ].rx_std_cfg .slot_cfg .data_bit_width = bits ;
330330 i2s_key_slot [i2s -> port ].rx_std_cfg .slot_cfg .ws_width = bits ;
331331 i2s_key_slot [i2s -> port ].rx_std_cfg .slot_cfg .slot_mode = slot_mode ;
332+ #if CONFIG_IDF_TARGET_ESP32
333+ i2s_key_slot [port ].rx_std_cfg .slot_cfg .slot_mask = (slot_mode == I2S_SLOT_MODE_MONO ) ? I2S_STD_SLOT_RIGHT : I2S_STD_SLOT_BOTH ;
334+ #else
335+ i2s_key_slot [port ].rx_std_cfg .slot_cfg .slot_mask = (slot_mode == I2S_SLOT_MODE_MONO ) ? I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH ;
336+ #endif // CONFIG_IDF_TARGET_ESP32
332337 i2s_key_slot [i2s -> port ].rx_std_cfg .clk_cfg .sample_rate_hz = rate ;
333338 i2s_channel_disable (i2s_key_slot [port ].rx_handle );
334339 err |= i2s_channel_reconfig_std_slot (i2s_key_slot [port ].rx_handle , & i2s_key_slot [i2s -> port ].rx_std_cfg .slot_cfg );
@@ -342,32 +347,41 @@ static esp_err_t _i2s_set_clk(i2s_stream_t *i2s, int rate, int bits, int ch)
342347 i2s_key_slot [i2s -> port ].tx_pdm_cfg .clk_cfg .sample_rate_hz = rate ;
343348 i2s_key_slot [i2s -> port ].tx_pdm_cfg .slot_cfg .data_bit_width = bits ;
344349 i2s_key_slot [i2s -> port ].tx_pdm_cfg .slot_cfg .slot_mode = slot_mode ;
350+ #if SOC_I2S_HW_VERSION_2
351+ i2s_key_slot [port ].tx_pdm_cfg .slot_cfg .line_mode = (slot_mode == I2S_SLOT_MODE_MONO ) ? I2S_PDM_TX_ONE_LINE_DAC : I2S_PDM_TX_ONE_LINE_CODEC ;
352+ #endif // SOC_I2S_HW_VERSION_2
345353 i2s_channel_disable (i2s_key_slot [port ].tx_handle );
346354 err |= i2s_channel_reconfig_pdm_tx_slot (i2s_key_slot [port ].tx_handle , & i2s_key_slot [i2s -> port ].tx_pdm_cfg .slot_cfg );
347355 err |= i2s_channel_reconfig_pdm_tx_clock (i2s_key_slot [port ].tx_handle , & i2s_key_slot [i2s -> port ].tx_pdm_cfg .clk_cfg );
348356 err |= i2s_channel_enable (i2s_key_slot [port ].tx_handle );
349357 }
350- #endif // SOC_I2S_SUPPORTS_PDM_TX
358+ #endif // SOC_I2S_SUPPORTS_PDM_TX
351359#if SOC_I2S_SUPPORTS_PDM_RX
352360 if (i2s_key_slot [port ].rx_handle != NULL && i2s -> type == AUDIO_STREAM_READER ) {
353361 i2s_key_slot [i2s -> port ].rx_pdm_cfg .clk_cfg .sample_rate_hz = rate ;
354362 i2s_key_slot [i2s -> port ].rx_pdm_cfg .slot_cfg .data_bit_width = bits ;
355363 i2s_key_slot [i2s -> port ].rx_pdm_cfg .slot_cfg .slot_mode = slot_mode ;
364+ i2s_key_slot [port ].rx_pdm_cfg .slot_cfg .slot_mask = (slot_mode == I2S_SLOT_MODE_MONO ) ? I2S_STD_SLOT_LEFT : I2S_STD_SLOT_BOTH ;
356365 i2s_channel_disable (i2s_key_slot [port ].rx_handle );
357366 err |= i2s_channel_reconfig_pdm_rx_slot (i2s_key_slot [port ].rx_handle , & i2s_key_slot [i2s -> port ].rx_pdm_cfg .slot_cfg );
358367 err |= i2s_channel_reconfig_pdm_rx_clock (i2s_key_slot [port ].rx_handle , & i2s_key_slot [i2s -> port ].rx_pdm_cfg .clk_cfg );
359368 err |= i2s_channel_enable (i2s_key_slot [port ].rx_handle );
360369 }
361- #endif // SOC_I2S_SUPPORTS_PDM_RX
370+ #endif // SOC_I2S_SUPPORTS_PDM_RX
362371
363- #endif // SOC_I2S_SUPPORTS_PDM
372+ #endif // SOC_I2S_SUPPORTS_PDM
364373#if SOC_I2S_SUPPORTS_TDM
365374 } else if (i2s -> config .transmit_mode == I2S_COMM_MODE_TDM ) {
366375 if (i2s_key_slot [port ].tx_handle != NULL && i2s -> type == AUDIO_STREAM_WRITER ) {
367376 i2s_key_slot [i2s -> port ].tx_tdm_cfg .clk_cfg .sample_rate_hz = rate ;
368377 i2s_key_slot [i2s -> port ].tx_tdm_cfg .slot_cfg .data_bit_width = bits ;
369378 i2s_key_slot [i2s -> port ].tx_tdm_cfg .slot_cfg .ws_width = bits ;
370379 i2s_key_slot [i2s -> port ].tx_tdm_cfg .slot_cfg .slot_mode = slot_mode ;
380+ if (slot_mode == I2S_SLOT_MODE_MONO ) {
381+ i2s_key_slot [port ].tx_tdm_cfg .slot_cfg .slot_mask = I2S_TDM_SLOT0 ;
382+ } else {
383+ i2s_key_slot [port ].tx_tdm_cfg .slot_cfg .slot_mask = I2S_TDM_SLOT0 | I2S_TDM_SLOT1 | I2S_TDM_SLOT2 ;
384+ }
371385 i2s_channel_disable (i2s_key_slot [port ].tx_handle );
372386 err |= i2s_channel_reconfig_tdm_slot (i2s_key_slot [port ].tx_handle , & i2s_key_slot [i2s -> port ].tx_tdm_cfg .slot_cfg );
373387 err |= i2s_channel_reconfig_tdm_clock (i2s_key_slot [port ].tx_handle , & i2s_key_slot [i2s -> port ].tx_tdm_cfg .clk_cfg );
@@ -383,7 +397,7 @@ static esp_err_t _i2s_set_clk(i2s_stream_t *i2s, int rate, int bits, int ch)
383397 err |= i2s_channel_reconfig_tdm_clock (i2s_key_slot [port ].rx_handle , & i2s_key_slot [i2s -> port ].rx_tdm_cfg .clk_cfg );
384398 err |= i2s_channel_enable (i2s_key_slot [port ].rx_handle );
385399 }
386- #endif // SOC_I2S_SUPPORTS_TDM
400+ #endif // SOC_I2S_SUPPORTS_TDM
387401 } else {
388402 ESP_LOGE (TAG , "Invalid I2S type, %d" , i2s -> config .transmit_mode );
389403 }
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