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schemas: pci: bridge: Document PCIe N_FTS
Per PCIe r6.0, sec 4.2.5.1, during Link training, a PCIe component captures the N_FTS value it receives. Per 4.2.5.6, when transitioning the Link from L0s to L0, it must transmit N_FTS Fast Training Sequences to enable the receiver to obtain bit and Symbol lock. Components may have device-specific ways to configure N_FTS values to advertise during Link training. Define an n_fts array with an entry for each supported data rate. Signed-off-by: Krishna Chaitanya Chundru <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring (Arm) <[email protected]>
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dtschema/schemas/pci/pci-bus-common.yaml

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@@ -128,6 +128,16 @@ properties:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 4, 8, 16, 32 ]
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n-fts:
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description:
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The number of Fast Training Sequences (N_FTS) required by the
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Receiver (this component) when transitioning the Link from L0s
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to L0; advertised during initial Link training. Each entry in
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the array specifies a PCIe data rate
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$ref: /schemas/types.yaml#/definitions/uint8-array
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minItems: 1
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maxItems: 5
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reset-gpios:
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description: GPIO controlled connection to PERST# signal
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maxItems: 1

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