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delhatchdelhatch
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Initial commit of working system. FFT=512 points.
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‎DE2_115_NIOS_HOST_MOUSE_VGA.asm.rpt

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Assembler report for DE2_115_NIOS_HOST_MOUSE_VGA
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Thu Nov 30 11:45:29 2017
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Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
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---------------------
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Assembler Summary
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3. Assembler Settings
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4. Assembler Encrypted IP Cores Summary
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5. Assembler Generated Files
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6. Assembler Device Options: C:/Users/Del/OneDrive/fpga/altera/Spectrum/DE2_115_NIOS_HOST_MOUSE_VGA_time_limited.sof
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7. Assembler Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 2017 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details.
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+---------------------------------------------------------------+
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; Assembler Summary ;
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+-----------------------+---------------------------------------+
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; Assembler Status ; Successful - Thu Nov 30 11:45:29 2017 ;
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; Revision Name ; DE2_115_NIOS_HOST_MOUSE_VGA ;
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; Top-level Entity Name ; Spectrum ;
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; Family ; Cyclone IV E ;
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; Device ; EP4CE115F29C7 ;
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+-----------------------+---------------------------------------+
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+----------------------------------+
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; Assembler Settings ;
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+--------+---------+---------------+
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; Option ; Setting ; Default Value ;
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+--------+---------+---------------+
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+--------------------------------------------------------+
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; Assembler Encrypted IP Cores Summary ;
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+--------+-------------------------------+---------------+
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; Vendor ; IP Core Name ; License Type ;
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+--------+-------------------------------+---------------+
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; Altera ; FFT/IFFT (6AF7 0034) ; OpenCore Plus ;
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; Altera ; Nios II Processor (6AF7 00A2) ; OpenCore Plus ;
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; Altera ; Signal Tap (6AF7 BCE1) ; Licensed ;
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; Altera ; Signal Tap (6AF7 BCEC) ; Licensed ;
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+--------+-------------------------------+---------------+
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+-----------------------------------------------------------------------------------------+
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; Assembler Generated Files ;
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+-----------------------------------------------------------------------------------------+
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; File Name ;
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+-----------------------------------------------------------------------------------------+
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; C:/Users/Del/OneDrive/fpga/altera/Spectrum/DE2_115_NIOS_HOST_MOUSE_VGA_time_limited.sof ;
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+-----------------------------------------------------------------------------------------+
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+-------------------------------------------------------------------------------------------------------------------+
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; Assembler Device Options: C:/Users/Del/OneDrive/fpga/altera/Spectrum/DE2_115_NIOS_HOST_MOUSE_VGA_time_limited.sof ;
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+----------------+--------------------------------------------------------------------------------------------------+
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; Option ; Setting ;
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+----------------+--------------------------------------------------------------------------------------------------+
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; JTAG usercode ; 0x03196A0E ;
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; Checksum ; 0x03196A0E ;
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+----------------+--------------------------------------------------------------------------------------------------+
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+--------------------+
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; Assembler Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus Prime Assembler
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Info: Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
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Info: Processing started: Thu Nov 30 11:45:22 2017
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off DE2_115_NIOS_HOST_MOUSE_VGA -c DE2_115_NIOS_HOST_MOUSE_VGA
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Info (115031): Writing out detailed assembly data for power analysis
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Info (115030): Assembler is generating device programming files
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Info (115017): Design contains a time-limited core -- only a single, time-limited programming file can be generated
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Warning (210042): Can't convert time-limited SOF into POF, HEX File, TTF, or RBF
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Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 635 megabytes
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Info: Processing ended: Thu Nov 30 11:45:29 2017
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Info: Elapsed time: 00:00:07
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Info: Total CPU time (on all processors): 00:00:07
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‎DE2_115_NIOS_HOST_MOUSE_VGA.cdf

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/* Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition */
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JedecChain;
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FileRevision(JESD32A);
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DefaultMfr(6E);
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P ActionCode(Cfg)
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Device PartName(EP4CE115F29) Path("C:/Users/Del/OneDrive/fpga/altera/Spectrum/") File("DE2_115_NIOS_HOST_MOUSE_VGA_time_limited.sof") MfrSpec(OpMask(1));
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ChainEnd;
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AlteraBegin;
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ChainType(JTAG);
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AlteraEnd;

‎DE2_115_NIOS_HOST_MOUSE_VGA.done

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Thu Nov 30 11:45:46 2017

‎DE2_115_NIOS_HOST_MOUSE_VGA.dpf

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<?xml version="1.0" encoding="UTF-8"?>
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<pin_planner>
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<pin_info>
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<pin name="HSMC_CLKIN_P1" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_CLKIN_N1" >
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</pin>
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<pin name="HSMC_CLKIN_P2" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_CLKIN_N2" >
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</pin>
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<pin name="HSMC_CLKOUT_P1" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_CLKOUT_N1" >
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</pin>
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<pin name="HSMC_CLKOUT_P2" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_CLKOUT_N2" >
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</pin>
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<pin name="HSMC_RX_D_P[16]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[16]" >
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</pin>
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<pin name="HSMC_RX_D_P[15]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[15]" >
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</pin>
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<pin name="HSMC_RX_D_P[14]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[14]" >
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</pin>
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<pin name="HSMC_RX_D_P[13]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[13]" >
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</pin>
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<pin name="HSMC_RX_D_P[12]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[12]" >
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</pin>
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<pin name="HSMC_RX_D_P[11]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[11]" >
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</pin>
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<pin name="HSMC_RX_D_P[10]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[10]" >
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</pin>
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<pin name="HSMC_RX_D_P[9]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[9]" >
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</pin>
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<pin name="HSMC_RX_D_P[8]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[8]" >
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</pin>
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<pin name="HSMC_RX_D_P[7]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[7]" >
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</pin>
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<pin name="HSMC_RX_D_P[6]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[6]" >
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</pin>
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<pin name="HSMC_RX_D_P[5]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[5]" >
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</pin>
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<pin name="HSMC_RX_D_P[4]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[4]" >
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</pin>
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<pin name="HSMC_RX_D_P[3]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[3]" >
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</pin>
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<pin name="HSMC_RX_D_P[2]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[2]" >
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</pin>
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<pin name="HSMC_RX_D_P[1]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[1]" >
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</pin>
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<pin name="HSMC_RX_D_P[0]" direction="Input" source="Hierarchy Database" diff_pair_node="HSMC_RX_D_N[0]" >
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</pin>
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<pin name="HSMC_TX_D_P[16]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[16]" >
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</pin>
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<pin name="HSMC_TX_D_P[15]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[15]" >
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</pin>
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<pin name="HSMC_TX_D_P[14]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[14]" >
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</pin>
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<pin name="HSMC_TX_D_P[13]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[13]" >
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</pin>
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<pin name="HSMC_TX_D_P[12]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[12]" >
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</pin>
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<pin name="HSMC_TX_D_P[11]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[11]" >
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</pin>
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<pin name="HSMC_TX_D_P[10]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[10]" >
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</pin>
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<pin name="HSMC_TX_D_P[9]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[9]" >
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</pin>
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<pin name="HSMC_TX_D_P[8]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[8]" >
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</pin>
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<pin name="HSMC_TX_D_P[7]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[7]" >
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</pin>
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<pin name="HSMC_TX_D_P[6]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[6]" >
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</pin>
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<pin name="HSMC_TX_D_P[5]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[5]" >
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</pin>
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<pin name="HSMC_TX_D_P[4]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[4]" >
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</pin>
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<pin name="HSMC_TX_D_P[3]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[3]" >
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</pin>
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<pin name="HSMC_TX_D_P[2]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[2]" >
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</pin>
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<pin name="HSMC_TX_D_P[1]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[1]" >
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</pin>
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<pin name="HSMC_TX_D_P[0]" direction="Output" source="Hierarchy Database" diff_pair_node="HSMC_TX_D_N[0]" >
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</pin>
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<pin name="HSMC_CLKIN_N1" source="Assignments" diff_pair_node="HSMC_CLKIN_P1" >
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</pin>
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<pin name="HSMC_CLKIN_N2" source="Assignments" diff_pair_node="HSMC_CLKIN_P2" >
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</pin>
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<pin name="HSMC_TX_D_N[0]" source="Assignments" diff_pair_node="HSMC_TX_D_P[0]" >
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</pin>
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<pin name="HSMC_RX_D_N[0]" source="Assignments" diff_pair_node="HSMC_RX_D_P[0]" >
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</pin>
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<pin name="HSMC_RX_D_N[1]" source="Assignments" diff_pair_node="HSMC_RX_D_P[1]" >
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</pin>
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<pin name="HSMC_TX_D_N[1]" source="Assignments" diff_pair_node="HSMC_TX_D_P[1]" >
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</pin>
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<pin name="HSMC_TX_D_N[2]" source="Assignments" diff_pair_node="HSMC_TX_D_P[2]" >
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</pin>
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<pin name="HSMC_RX_D_N[2]" source="Assignments" diff_pair_node="HSMC_RX_D_P[2]" >
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</pin>
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<pin name="HSMC_TX_D_N[3]" source="Assignments" diff_pair_node="HSMC_TX_D_P[3]" >
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</pin>
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<pin name="HSMC_RX_D_N[3]" source="Assignments" diff_pair_node="HSMC_RX_D_P[3]" >
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</pin>
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<pin name="HSMC_TX_D_N[4]" source="Assignments" diff_pair_node="HSMC_TX_D_P[4]" >
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</pin>
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<pin name="HSMC_RX_D_N[4]" source="Assignments" diff_pair_node="HSMC_RX_D_P[4]" >
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</pin>
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<pin name="HSMC_TX_D_N[5]" source="Assignments" diff_pair_node="HSMC_TX_D_P[5]" >
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</pin>
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<pin name="HSMC_RX_D_N[5]" source="Assignments" diff_pair_node="HSMC_RX_D_P[5]" >
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</pin>
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<pin name="HSMC_TX_D_N[6]" source="Assignments" diff_pair_node="HSMC_TX_D_P[6]" >
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</pin>
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<pin name="HSMC_RX_D_N[6]" source="Assignments" diff_pair_node="HSMC_RX_D_P[6]" >
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</pin>
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<pin name="HSMC_TX_D_N[7]" source="Assignments" diff_pair_node="HSMC_TX_D_P[7]" >
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</pin>
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<pin name="HSMC_RX_D_N[7]" source="Assignments" diff_pair_node="HSMC_RX_D_P[7]" >
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</pin>
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<pin name="HSMC_TX_D_N[8]" source="Assignments" diff_pair_node="HSMC_TX_D_P[8]" >
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</pin>
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<pin name="HSMC_RX_D_N[8]" source="Assignments" diff_pair_node="HSMC_RX_D_P[8]" >
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</pin>
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<pin name="HSMC_TX_D_N[9]" source="Assignments" diff_pair_node="HSMC_TX_D_P[9]" >
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</pin>
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<pin name="HSMC_RX_D_N[9]" source="Assignments" diff_pair_node="HSMC_RX_D_P[9]" >
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</pin>
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<pin name="HSMC_TX_D_N[10]" source="Assignments" diff_pair_node="HSMC_TX_D_P[10]" >
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</pin>
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<pin name="HSMC_RX_D_N[10]" source="Assignments" diff_pair_node="HSMC_RX_D_P[10]" >
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</pin>
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<pin name="HSMC_TX_D_N[11]" source="Assignments" diff_pair_node="HSMC_TX_D_P[11]" >
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</pin>
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<pin name="HSMC_RX_D_N[11]" source="Assignments" diff_pair_node="HSMC_RX_D_P[11]" >
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</pin>
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<pin name="HSMC_TX_D_N[12]" source="Assignments" diff_pair_node="HSMC_TX_D_P[12]" >
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</pin>
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<pin name="HSMC_RX_D_N[12]" source="Assignments" diff_pair_node="HSMC_RX_D_P[12]" >
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</pin>
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<pin name="HSMC_TX_D_N[13]" source="Assignments" diff_pair_node="HSMC_TX_D_P[13]" >
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</pin>
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<pin name="HSMC_RX_D_N[13]" source="Assignments" diff_pair_node="HSMC_RX_D_P[13]" >
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</pin>
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<pin name="HSMC_TX_D_N[14]" source="Assignments" diff_pair_node="HSMC_TX_D_P[14]" >
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</pin>
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<pin name="HSMC_RX_D_N[14]" source="Assignments" diff_pair_node="HSMC_RX_D_P[14]" >
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</pin>
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<pin name="HSMC_TX_D_N[15]" source="Assignments" diff_pair_node="HSMC_TX_D_P[15]" >
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</pin>
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<pin name="HSMC_RX_D_N[15]" source="Assignments" diff_pair_node="HSMC_RX_D_P[15]" >
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</pin>
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<pin name="HSMC_TX_D_N[16]" source="Assignments" diff_pair_node="HSMC_TX_D_P[16]" >
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</pin>
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<pin name="HSMC_RX_D_N[16]" source="Assignments" diff_pair_node="HSMC_RX_D_P[16]" >
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</pin>
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<pin name="HSMC_CLKOUT_N2" source="Assignments" diff_pair_node="HSMC_CLKOUT_P2" >
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</pin>
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<pin name="HSMC_CLKOUT_N1" source="Assignments" diff_pair_node="HSMC_CLKOUT_P1" >
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</pin>
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</pin_info>
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<buses>
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</buses>
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<group_file_association>
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</group_file_association>
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<pin_planner_file_specifies>
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</pin_planner_file_specifies>
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</pin_planner>

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