We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 6c09a74 commit 7e6ecc0Copy full SHA for 7e6ecc0
src/target/nrf51.c
@@ -144,6 +144,8 @@ bool nrf51_probe(target_s *t)
144
uint32_t ram_size = target_mem32_read32(t, NRF52_INFO_RAM);
145
t->driver = "nRF52";
146
t->target_options |= TOPT_INHIBIT_NRST;
147
+ /* On nRF52 SoC, Cortex-M4F allows SRAM access without halting */
148
+ t->target_options |= TOPT_NON_HALTING_MEM_IO;
149
target_add_ram32(t, 0x20000000U, ram_size * 1024U);
150
nrf51_add_flash(t, 0, page_size * code_size, page_size);
151
nrf51_add_flash(t, NRF51_UICR, page_size, page_size);
0 commit comments