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;lda #$00 ;is already zero due to anc #$c0, that is why we favour anc #$co over asl, as we save a byte
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;lda #$00 ;is already zero due to and #$c0, that is why we favour and #$c0 over asl, as we save a byte
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ldx #<preamble ;target for received bytes
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jsr.ld_set_block_tgt;load 5 bytes preamble - returns with C = 1 always
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@@ -240,8 +240,7 @@ bitfire_loadraw_
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}
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ldx <block_addr_lo ;block_address lo
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lda <block_addr_hi ;block_address hi
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-
;beq .jam
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ldy <block_status ;status -> first_block?
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bit <block_status ;status -> first_block?
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bmi +
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stx bitfire_load_addr_lo ;yes, store load_address (also lz_src in case depacker is present)
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sta bitfire_load_addr_hi
@@ -260,22 +259,19 @@ bitfire_ntsc3_op ldx #$6d ;opcode for adc -> repair any rts being set (also
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lsr;%0dddd111
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lsr;%00dddd11 1
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ldx <CONFIG_LAX_ADDR ;waste one cycle
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-
;nop
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bitfire_ntsc0 ora $dd00;%dddddd11 1, ora again to preserve
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stx $dd02
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ror;%1dddddd1 1
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ror;%11dddddd 1
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ldx #$3f
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sax .ld_nibble + 1
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-
;nop
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bitfire_ntsc2and$dd00;%ddxxxxxx might loose some lower bits, but will be repaired later on ora
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stx $dd02
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.ld_nibble ora #$00;%dddddddd -> merge in lower bits again and heal bits being dropped by previous and
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.ld_store sta $b00b,y
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.ld_gentry lax <CONFIG_LAX_ADDR
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-
;nop
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.ld_gend
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bitfire_ntsc3 adc $dd00;%dd1110xx will be like #$38 (A = $37 + carry) be added
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stx $dd02;carry is cleared now after last adc, we can exit here with carry cleared (else set if EOF) and do our rts with .ld_gend
@@ -288,17 +284,9 @@ bitfire_ntsc3 adc $dd00 ;%dd1110xx will be like #$38 (A = $37 + carry) be
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;branch out at == 0? would then start with atn set, would be verycool, just preamble would end same way, what would suck? :-( would need to drop level before we enter loop at all? or between preamble and data?
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cpy #$01;check on 0 in carry, too bad we can't use that result with direct bail out, still some bits to transfer
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ldx #$3f
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-
;nop
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bitfire_ntsc1 ora $dd00;%dddd111x, ora to preserve the 3 set bits
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stx $dd02
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-
;XXX TODO
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;cpy #$ff
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;bcc loop
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;block enter: ldx #$3f -> $dd02
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;block exit: ldx #$37 -> $dd02
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;need to bail out on lsr?
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-
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!if >* != >.ld_gloop { !error "getloop code crosses page!" } ;XXX TODO in fact the branch can also take 4 cycles if needed, ldx <CONFIG_LAX_ADDR wastes one cycle anyway
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bcs.ld_gloop
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.ld_en_exit
@@ -555,7 +543,7 @@ link_ack_interrupt
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.lz_clc
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clc
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bcc.lz_clc_back
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nop
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nop;this hurts, but needs to be aligned
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nop
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nop
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}
@@ -567,7 +555,7 @@ link_ack_interrupt
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lda #$01;restore initial length val
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}
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asl <lz_bits
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.lz_redirect2bcs.lz_match;either match with new offset or old offset
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bcs.lz_match;either match with new offset or old offset
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;------------------
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;LITERAL
@@ -611,7 +599,7 @@ link_ack_interrupt
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;in case of type bit == 0 we can always receive length (not length - 1), can this used for an optimization? can we fetch length beforehand? and then fetch offset? would make length fetch simpler? place some other bit with offset?
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lda #$01
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asl <lz_bits
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.lz_redirect1bcs.lz_match;either match with new offset or old offset
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bcs.lz_match;either match with new offset or old offset
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