Overlay tutorial 2 (DMA example) won't work on Vitis HLS

[mdarnold1]

Viits HLS fails for the second example in docs/source/overlay_design_methodology/overlay_tutorial.ipynb, old Vivado IP cannot be used with new Vivado since 2020.2, and bitstreams generated using older VIvado fail with output all zeros on newer Pynq (e.g. 3.0 but probably 2.7 as well). This is likely due to the differences in stream handling between Vivado HLS and Vitis HLS, e.g. comparing the AXIS with side channel examples in UG902 & UG1399 2020.1.

I suggest that the example for latest Pynq be updated to point to e.g. https://discuss.pynq.io/t/tutorial-using-a-hls-stream-ip-with-dma-part-1-hls-design/3344.

[mariodruiz]

Hi @mdarnold1,

Thank you for reporting this. We will work to fix this for the next release.