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@Sutter099 Sutter099 commented Mar 27, 2025

pwm: cv1800: fix Output-Enable (OE) logic to restore PWM output

Desciption: This PR is created on behalf of @eternal-echo. He has been working on bug fixing of Duo.

The original driver only set the OE bit when it was already set, which means
OE would never be enabled on first use. As a result, PWM output would not
appear even when period/duty_cycle and enable were correctly configured.

This patch fixes the OE control logic:

  • Always set OE bit when enabling PWM, regardless of prior state
  • Clear OE bit when disabling PWM
  • Remove redundant OE state read & check

This resolves the issue of missing PWM signal on the output pin.

Tested on Sophgo CV1800 (Milkv Duo) board, using PWM1 (pin B11).
PWM signal verified via logic analyzer and sysfs interface.

To reproduce:

Pinmux was configured via:

[root@milkv-duo]~# duo-pinmux -w B11/PWM_1

[root@milkv-duo]~# ls /sys/class/pwm/pwmchip0/pwm1/
capture  duty_cycle  enable  period  polarity  power  uevent
[root@milkv-duo]~# echo 1 > /sys/class/pwm/pwmchip0/export
[root@milkv-duo]~# echo "normal" > /sys/class/pwm/pwmchip0/pwm1/polarity
[root@milkv-duo]~# echo 1000000 > /sys/class/pwm/pwmchip0/pwm1/period
[root@milkv-duo]~# echo 200000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle
[root@milkv-duo]~# echo 1 > /sys/class/pwm/pwmchip0/pwm1/enable

[root@milkv-duo]~# echo inversed > /sys/class/pwm/pwmchip0/pwm1/polarity

Observed 1 kHz 80%/20% duty waveform on B11.
image

image

Signed-off-by: eternal-echo [email protected]

xhackerustc and others added 14 commits December 18, 2024 17:51
Add devicetree binding for Sophgo CV1800B SoC reset controller.

Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: Ze Huang <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Add reset controller support for Sophgo CV1800B SoC reusing the
reset-simple driver.

Signed-off-by: Jisheng Zhang <[email protected]>
Add the reset device tree node and reset phandle to uart nodes.
Although, the resets are deasserted by default. Add them for
completeness.

Signed-off-by: Jisheng Zhang <[email protected]>
Signed-off-by: AnnanLiu <[email protected]>
Signed-off-by: Ze Huang <[email protected]>
…driver

Commit 8ec99b0 ("irqchip/sifive-plic: Convert PLIC driver into
aplatform driver")[1] broke timer initialization because the PLIC IRQdomain
is no longer available in a TIMER_OF_DECLARE. The following error was
observed:

[    0.024789] irq: no irq domain found for interrupt-controller@70000000 !

Following [2], fix this by moving the IRQ handling code to a platform
driver. Tested by changing system clocksource.

Link: https://lore.kernel.org/linux-arm-kernel/[email protected]/ [1]
Link: https://lore.kernel.org/linux-riscv/[email protected]/ [2]

Signed-off-by: Ze Huang <[email protected]>
dw_apb_timer_of cannot get clock resource without name "timer".

Signed-off-by: Ze Huang <[email protected]>
The original code had a wrong logic for Output-Enable (OE) setting.
It would only set OE if it was already set, which prevents PWM from
working properly. Modified the code to:

- Check and set OE only when not already set during enable
- Clear OE when disabling PWM
- Remove redundant OE state check

This fixes the PWM output not working issue.

Signed-off-by: eternal-echo <[email protected]>
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3 participants