dts: riscv: sophgo: fix dmac data-width config for cv18xx

The Duo DMA controller supports a 32-bit bus width. If the configuration
is incorrect, the DMA block transfer size may exceed the hardware's maximum
supported size, resulting in data loss during transfers.

Link to tests: https://gist.github.com/Sutter099/4fa99bb2d89e5af975983124704b3861

Signed-off-by: Ze Huang <[email protected]>

Author: Sutter099

arch/riscv/boot/dts/sophgo/cv18xx.dtsi

@@ -521,7 +521,7 @@
 					   1024 1024 1024 1024>;
 			snps,priority = <0 1 2 3 4 5 6 7>;
 			snps,dma-masters = <2>;
-			snps,data-width = <4>;
+			snps,data-width = <2>;
 			status = "disabled";
 		};