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lines changed Original file line number Diff line number Diff line change @@ -93,17 +93,15 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constr
9393
9494# Must be defined before the ifeq's
9595export SYNTH_HDL_FRONTEND = slang
96- export SYNTH_HIERARCHICAL ?= 0
96+ export SYNTH_HIERARCHICAL = 1
9797
9898ifeq ($(SYNTH_HDL_FRONTEND ) ,verific)
9999 # Reduce utilization for verific since it runs into issues with DPL not being
100100 # able to place instances or with one-site gap/overlap issues
101101 export CORE_UTILIZATION = 35
102102else
103- ifeq ($(SYNTH_HIERARCHICAL),1)
104- # Reduce the amount of resizing done between GPL and DPL
105- export EARLY_SIZING_CAP_RATIO = 6
106- endif
103+ # Reduce the amount of resizing done between GPL and DPL
104+ export EARLY_SIZING_CAP_RATIO = 6
107105 export CORE_UTILIZATION = 45
108106endif
109107
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